Networks on Chips

Networks on Chips

Technology and Tools

1st Edition - February 14, 2006

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  • Editor: Luca Benini
  • eBook ISBN: 9780080473567
  • Hardcover ISBN: 9780123705211

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The design of today's semiconductor chips for various applications, such as telecommunications, poses various challenges due to the complexity of these systems. These highly complex systems-on-chips demand new approaches to connect and manage the communication between on-chip processing and storage components and networks on chips (NoCs) provide a powerful solution. This book is the first to provide a unified overview of NoC technology. It includes in-depth analysis of all the on-chip communication challenges, from physical wiring implementation up to software architecture, and a complete classification of their various Network-on-Chip approaches and solutions.

Key Features

* Leading-edge research from world-renowned experts in academia and industry with state-of-the-art technology implementations/trends
* An integrated presentation not currently available in any other book
* A thorough introduction to current design methodologies and chips designed with NoCs


Primary: Researchers/Practitioners in Multiprocessor Systems on Chips; Networks on Chips. VLSI design companies (ST Microelectronics, Arteris, etc.) involved currently with implementing NoCs on silicon.

Secondary: Graduate-level courses in System on Chip design.

Table of Contents

  • I. Introduction and Motivation
    Why on chip networks?
    State of the art
    Technology trends

    II. Architectures for NoCs
    Direct vs indirect networks
    Standard architectures and formal properties
    Ad hoc networks

    III. Physical network layer
    Wiring issues
    Physical routing
    Driver/receiver design
    Noise immunity

    IV. Data-link layer and encoding
    Medium access control
    Data encoding
    Error correcting codes: theory and practice
    Arbitration issues

    V. Switching and Routing in NoCs
    Packets, flits.
    Data forwarding schemes
    Routing: algorithms and routers
    QoS guarantees

    VI. Software for NoCs
    Programming paradigms: shared medium vs message passing
    Middleware issues. layering and software encapsulation
    Application layer issue and network-aware compilation

    VII. Tools for NoC Design
    Analysis and Synthesis of NoCs
    Present tools (Bones, Xpipes) and future outlook

    VIII. On-Chip multiprocessors
    High-performance monolithic multiprocessors
    Network issues

    IX. SoCs based on NoCs
    Examples of other design chips using NoCs

Product details

  • No. of pages: 408
  • Language: English
  • Copyright: © Morgan Kaufmann 2006
  • Published: February 14, 2006
  • Imprint: Morgan Kaufmann
  • eBook ISBN: 9780080473567
  • Hardcover ISBN: 9780123705211

About the Editor

Luca Benini

Affiliations and Expertise

University of Bologna, Italy.

About the Authors

Giovanni De Micheli

Affiliations and Expertise

École Polytechnique Fédérale de Lausanne, Switzerland

Luca Benini

Affiliations and Expertise

University of Bologna, Italy.

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