Cache Memory Book, The

Cache Memory Book, The

2nd Edition - January 13, 1998

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  • Author: Jim Handy
  • Hardcover ISBN: 9780123229809

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Description

The Second Edition of The Cache Memory Book introduces systems designers to the concepts behind cache design. The book teaches the basic cache concepts and more exotic techniques. It leads readers through someof the most intricate protocols used in complex multiprocessor caches. Written in an accessible, informal style, this text demystifies cache memory design by translating cache concepts and jargon into practical methodologies and real-life examples. It also provides adequate detail to serve as a reference book for ongoing work in cache memory design.The Second Edition includes an updated and expanded glossary of cache memory terms and buzzwords. The book provides new real world applications of cache memory design and a new chapter on cache"tricks".

Key Features

  • Illustrates detailed example designs of caches
  • Provides numerous examples in the form of block diagrams, timing waveforms, state tables, and code traces
  • Defines and discusses more than 240 cache specific buzzwords, comparing in detail the relative merits of different design methodologies
  • Includes an extensive glossary, complete with clear definitions, synonyms, and references to the appropriate text discussions

Readership

Practitioners in the field of computer design, including system design engineers and memory design specialists. Also intended as a supplementary textbook for graduate level computer architecture courses.

Table of Contents

  • What is Cache Memory? How are Caches Designed? Cache Memories and RISC Processors. Maintaining Coherency in Cached Systems. Cute Cache Tricks. Subject Index.

Product details

  • No. of pages: 229
  • Language: English
  • Copyright: © Morgan Kaufmann 1998
  • Published: January 13, 1998
  • Imprint: Morgan Kaufmann
  • Hardcover ISBN: 9780123229809

About the Author

Jim Handy

Jim Handy is a Principal Analyst for memories in Dataquest's Semiconductor group. He is a frequent lecturer and writer on the subject of cache memorydesign and is a patent holder in the cache design field.

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