VLSI Test Principles and Architectures

VLSI Test Principles and Architectures

Design for Testability

1st Edition - July 7, 2006

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  • Authors: Laung-Terng Wang, Cheng-Wen Wu, Xiaoqing Wen
  • eBook ISBN: 9780080474793
  • Hardcover ISBN: 9780123705976

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Description

This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time-to-volume.

Key Features

  • Most up-to-date coverage of design for testability.
  • Coverage of industry practices commonly found in commercial DFT tools but not discussed in other books. 
  • Numerous, practical examples in each chapter illustrating basic VLSI test principles and DFT architectures.

Readership

PRIMARY: Practitioners/Researchers in VLSI Design and Testing; Design or Test Engineers, as well as research institutes.

SECONDARY: Undergraduate and graduate-level courses in Electronic Testing, Digital Systems Testing, Digital Logic Test & Simulation, and VLSI Design.

Table of Contents

  • Chapter 1 – Introduction
    Chapter 2 – Design for Testability
    Chapter 3 – Logic and Fault Simulation
    Chapter 4 – Test Generation
    Chapter 5 – Logic Built-In Self-Test
    Chapter 6 – Test Compression
    Chapter 7 – Logic Diagnosis
    Chapter 8 – Memory Testing and Built-In Self-Test
    Chapter 9 – Memory Diagnosis and Built-In Self-Repair
    Chapter 10 – Boundary Scan and Core-Based Testing
    Chapter 11 – Analog and Mixed-Signal Testing
    Chapter 12 – Test Technology Trends in the Nanometer Age

Product details

  • No. of pages: 808
  • Language: English
  • Copyright: © Morgan Kaufmann 2006
  • Published: July 7, 2006
  • Imprint: Morgan Kaufmann
  • eBook ISBN: 9780080474793
  • Hardcover ISBN: 9780123705976

About the Authors

Laung-Terng Wang

Laung-Terng Wang, Ph.D., is founder, chairman, and chief executive officer of SynTest Technologies, CA. He received his EE Ph.D. degree from Stanford University. A Fellow of the IEEE, he holds 18 U.S. Patents and 12 European Patents, and has co-authored/co-edited two internationally used DFT textbooks- VLSI Test Principles and Architectures (2006) and System-on-Chip Test Architectures (2007).

Affiliations and Expertise

SynTest Technologies, Inc., Sunnyvale, CA, USA

Cheng-Wen Wu

Affiliations and Expertise

National Tsing Hua University, Hsinchu, Taiwan.

Xiaoqing Wen

Affiliations and Expertise

Kyushu Institute of Technology, Fukuoka, Japan.

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