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This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time-to-volume.
- Most up-to-date coverage of design for testability.
- Coverage of industry practices commonly found in commercial DFT tools but not discussed in other books.
- Numerous, practical examples in each chapter illustrating basic VLSI test principles and DFT architectures.
PRIMARY: Practitioners/Researchers in VLSI Design and Testing; Design or Test Engineers, as well as research institutes.
SECONDARY: Undergraduate and graduate-level courses in Electronic Testing, Digital Systems Testing, Digital Logic Test & Simulation, and VLSI Design.
Chapter 1 – Introduction Chapter 2 – Design for Testability Chapter 3 – Logic and Fault Simulation Chapter 4 – Test Generation Chapter 5 – Logic Built-In Self-Test Chapter 6 – Test Compression Chapter 7 – Logic Diagnosis Chapter 8 – Memory Testing and Built-In Self-Test Chapter 9 – Memory Diagnosis and Built-In Self-Repair Chapter 10 – Boundary Scan and Core-Based Testing Chapter 11 – Analog and Mixed-Signal Testing Chapter 12 – Test Technology Trends in the Nanometer Age
- No. of pages:
- © Morgan Kaufmann 2006
- 7th July 2006
- Morgan Kaufmann
- Hardcover ISBN:
- Paperback ISBN:
- eBook ISBN:
Laung-Terng Wang, Ph.D., is founder, chairman, and chief executive officer of SynTest Technologies, CA. He received his EE Ph.D. degree from Stanford University. A Fellow of the IEEE, he holds 18 U.S. Patents and 12 European Patents, and has co-authored/co-edited two internationally used DFT textbooks- VLSI Test Principles and Architectures (2006) and System-on-Chip Test Architectures (2007).
SynTest Technologies, Inc., Sunnyvale, CA, USA
National Tsing Hua University, Hsinchu, Taiwan.
Kyushu Institute of Technology, Fukuoka, Japan.
In the era of large systems embedded in a single system-on-chip (SOC) and fabricated continuously shrinking technologies, it is important to ensure correct behavior of the whole system. Electronic design and test engineers of today have to deal with these complex and heterogeneous systems (digital, mixed-signal, memory), but few have the possibility to study the whole field in a detailed and deep way. This book provides an extremely broad knowledge of the discipline, covering the fundamentals in detail, as well as the most recent and advanced concepts. Michel Renovell, Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier (LIRMM), Montpellier, France This book combines in a unique way insight into industry practices commonly found in commercial DFT tools but not discussed in textbooks, and a sound treatment of the future fundamentals. The comprehensive review of future test technology trends, including self-repair, soft error protection, MEMS testing, and RF testing, leads students and researchers to advanced DFT research. Hans-Joachim Wunderlich, University of Stuttgart, Germany Recent advances in semiconductor manufacturing have made design for testability (DFT) an essential part of nanometer designs. I am pleased to find a DFT textbook of this comprehensiveness that can serve both academic and professional needs. Andre Ivanov, University of British Columbia, Canada This is the most recent book covering all aspects of digital systems testing. It is a “must read” for anyone focused on learning modern test issues, test research, and test practices. Kewal K. Saluja, University of Wisconsin-Madison By covering the basic DFT theory and methodology on digital, memory, as well as analog and mixed-signal (AMS) testing, this book stands out as one best reference book that equips practitioners with testable SOC design skills. Yihe Sun, Tsinghua University, Beijing, China
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