
Rapid System Prototyping with FPGAs
Accelerating the Design Process
Resources
Description
Key Features
- In-the-trenches expert authors assure the most applicable advice to practicing engineers
- Dual focus on successfully making critical decisions and avoiding common pitfalls appeals to engineers pressured for speed and perfection
- Hardware and software are both covered, in order to address the growing trend toward "cross-pollination" of engineering expertise
Readership
Table of Contents
Dedication
Acknowledgments
About the Authors
Chapter 1: Introduction
1.1 FPGA Rapid Design Implementation Potential
1.2 Rapidly Evolving Technology Field
1.3 Design Skill Set Crossover
1.4 Hardware Knowledge for Software/Firmware Designers
1.5 Software Knowledge for Hardware Designers
1.6 When FPGA Technology May Not Be an Ideal Fit
1.7 When FPGAs Technology May Be Appropriate
1.8 Summary
Chapter 2: FPGA Fundamentals
2.1 Overview
2.2 SRAM-Based FPGA Architecture
2.3 Advanced FPGA Features
2.4 Summary
Chapter 3: Optimizing the Development Cycle
3.1 Overview
3.2 FPGA Design Flow
3.3 Summary
Chapter 4: System Engineering
4.1 Overview
4.2 Common Design Challenges and Mistakes
4.3 Defined FPGA Design Process
4.4 Project Engineering and Management
4.5 Training
4.6 Support
4.7 Design Configuration Management
4.8 Summary
Chapter 5: FPGA Device-Level Design Decisions
5.1 Overview
5.2 FPGA Selection Categories
5.3 Design Decisions
5.4 Device Selection Checklist
5.5 Summary
Chapter 6: Board-Level Design Decisions and Allocation
6.1 Overview
6.2 Packaging
6.3 BGA Component Considerations
6.4 I/O Assignment Iteration
6.5 FPGA Device Schematic Symbol Generation
6.6 Thermal
6.7 Board Layout
6.8 Signal Integrity
6.9 Power
6.10 Summary
Chapter 7: Design Implementation
7.1 Overview
7.2 Design Architecture
7.3 Design Entry
7.4 RTL
7.5 Synthesis
7.6 Place and Route
7.7 Summary
Chapter 8: Design Simulation
8.1 Overview
8.2 Stages of Simulation
8.3 Types of Simulation Files
8.4 How Much Simulation?
8.5 Hierarchical Design and Simulation
8.6 Common Simulation Mistakes and Tips
8.7 Summary
Chapter 9: Design Constraints and Optimization
9.1 Overview
9.2 Design Constraint Management
9.3 Design Optimization
9.4 Summary
Chapter 10: Configuration
10.1 Overview
10.2 On-Board Device Configuration
10.3 Configuration Cable Interface
10.4 JTAG Standard
10.5 Design Security
10.6 Summary
Chapter 11: Board-Level Testing
11.1 Overview
11.2 Design Debug Checklist
11.3 Summary
Chapter 12: Advanced Topics Introduction
12.1 Overview
12.2 Reduced Power Consumption
12.3 Volume Production Options
12.4 Summary
Chapter 13: Cores and Intellectual Property
13.1 Overview
13.2 Types of IP
13.3 Categories of IP
13.4 Trade Studies
13.5 Make versus Buy?
13.6 IP Implementation/Tools
13.7 IP Testing/Debug
13.8 Summary
Chapter 14: Embedded Processing Cores
14.1 Overview
14.2 FPGA Embedded Processor Types
14.3 FPGA Processor Use Considerations
14.4 System Design Considerations
14.5 FPGA Embedded Processor Concept Example
14.6 FPGA Embedded Processor Design Checklist
14.7 Summary
Chapter 15: Digital Signal Processing
15.1 Overview
15.2 Basic DSP System
15.3 Essential DSP Terms
15.4 DSP Architectures
15.5 Parallel Execution in DSP Components
15.6 Parallel Execution in FPGA
15.7 When to Use FPGAs for DSP
15.8 FPGA DSP Design Considerations
15.9 FIR Filter Concept Example
15.10 Summary
Chapter 16: Advanced Interconnect
16.1 Overview
16.2 Interconnection Categories
16.3 Advanced I/O Interface Challenges
16.4 Implementing an Advanced Parallel I/O Interface
16.5 Implementing an Advanced Serial I/O Interface
16.6 Summary
Chapter 17: Bringing It All Together
17.1 System Overview
17.2 Requirements Phase
17.3 Architectural Phase
17.4 Implementation Phase
17.5 Verification Phase
17.6 Prototype Delivery
17.7 Summary
Appendix A: Rapid System Prototyping Technical References
Appendix B: Design Phases
Abbreviations and Acronyms
Index
Product details
- No. of pages: 320
- Language: English
- Copyright: © Newnes 2005
- Published: September 20, 2005
- Imprint: Newnes
- eBook ISBN: 9780080457376
About the Authors
R. C. Cofer
Affiliations and Expertise
Benjamin Harding
Affiliations and Expertise
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