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Introduction to 6800/6802 Microprocessor Systems - 1st Edition - ISBN: 9780434918270, 9781483183138

Introduction to 6800/6802 Microprocessor Systems

1st Edition

Hardware, Software and Experimentation

Authors: Robert J. Simpson Trevor J. Terrell
eBook ISBN: 9781483183138
Imprint: Butterworth-Heinemann
Published Date: 1st January 1982
Page Count: 250
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Introduction to 6800/6802 Microprocessor Systems: Hardware, Software and Experimentation introduces the reader to the features, characteristics, operation, and applications of the 6800/6802 microprocessor and associated family of devices. Many worked examples are included to illustrate the theoretical and practical aspects of the 6800/6802 microprocessor. Comprised of six chapters, this book begins by presenting several aspects of digital systems before introducing the concepts of fetching and execution of a microprocessor instruction. Details and descriptions of hardware elements (MPU, RAM, ROM, PIA, etc.) necessary for the design and implementation of dedicated systems are also considered. Subsequent chapters focus on how the 6800/6802 microprocessor can be programmed at the machine-code level and by assembler programming techniques; the principles involved in interfacing the MPU system to peripheral equipment; practical aspects of parallel and serial data transfer techniques using the PIA and ACIA, respectively; hardware and software features of the Motorola MEK6802D5E evaluation system. The book concludes by discussing details of 12 investigations that may be undertaken using the MEK6802D5E evaluation system. This monograph is intended for students, technicians, scientists, and engineers.

Table of Contents

Chapter 1 Digital System Concepts

1.1 Introduction

1.2 Number Systems

1.2.1 Decimal System

1.2.2 Binary System

1.2.3 Hexadecimal System

1.2.4 Conversion of a Number of Radix r to Its Decimal Equivalent

1.2.5 Conversion of a Decimal Number to Its Radix r Equivalent

1.2.6 Binary-Coded-Decimal System

1.3 Binary Arithmetic

1.3.1 Binary Addition

1.3.2 Binary Subtraction

1.3.3 Binary Subtraction Using Complement Arithmetic

1.3.4 Binary Multiplication

1.3.5 Binary Division

1.4 Logic Elements

1.4.1 AND Gate

1.4.2 OR Gate (Inclusive-OR)

1.4.3 NOT Gate (Inverter or Complement Gate)

1.4.4 NAND Gate

1.4.5 NOR Gate


1.5 Flip-Flops, Registers and Counters

1.5.1 Set-Reset Flip-FloP

1.5.2 D-Type Flip-Flop

1.5.3 Clocked J-K Flip-Flop

1.5.4 Registers

1.5.5 Counters

1.5.6 Connection of Devices to Bus Lines

1.6 Memory Elements

1.6.1 Random Access Memory (RAM)

1.6.2 Read-Only Memory (ROM)

1.7 Arithmetic Logic Unit (ALU)

1.7.1 Parallel Binary Adder

1.7.2 ALU Logic Functions

1.8 Concluding Remarks



Chapter 2 Basic Microprocessor System Hardware

2.1 Introduction

2.2 Minimum Hardware Configuration

2.3 6800/6802 MPU Elements

2.3.1 6800 MPU Signals

2.3.2 6802 MPU Signals

2.3.3 6800 and 6802 Accessible MPU Registers

2.3.4 6800 Two-Phase Clock Generator

2.3.5 Reset Pulse Generation

2.4 6800/6802 System Elements

2.4.1 Random Access Memory (RAM)

2.4.2 Mask-Programmable Read-Only Memory (ROM)

2.4.3 Erasable Programmable Read-Only Memory

2.4.4 Peripheral Interface Adapter (PIA)

2.4.5 Asynchronous Communications Interface Adapter (ACIA)

2.5 Dedicated System Configuration

2.5.1 System Specification

2.5.2 System Memory-Map Organisation

2.6 Concluding Remarks



Chapter 3 6800/6802 Programming

3.1 Introduction

3.2 Flowcharts

3.3 6800/6802 Addressing Modes

3.3.1 Inherent (Accumulator or Implied) Addressing

3.3.2 Immediate Addressing

3.3.3 Direct Addressing

3.3.4 Extended Addressing

3.3.5 Indexed Addressing

3.3.6 Relative Addressing

3.4 6800/6802 Instruction Set

3.5 Machine-Code Programming

3.6 Time Delay Programs

3.6.1 Time Delay Subroutine

3.7 6800/6802 Assembler

3.7.1 Assembler Programming

3.7.2 Source Statement Format

3.7.3 Assembler Directives

3.7.4 Assembler Error Messages

3.7.5 Illustrative Example

3.8 Concluding Remarks



Chapter 4 System Input/Output

4.1 Introduction

4.2 A Simple One-Byte Memory-Mapped Interface

4.3 Peripheral Interface Adapter (PIA)

4.3.1 Interrupt Requests

4.4 Asynchronous Communications Interface Adapter (ACIA)

4.4.1 Serial Data Word

4.4.2 ACIA Initialisation and Operation

4.5 Interrupt Vectors

4.5.1 Reset Vectors

4.5.2 Software Interrupt (SWI)

4.5.3 Non-Maskable Interrupt (NMI)

4.6 Interrupt Priority

4.7 Direct Memory Access (DMA)

4.8 Concluding Remarks



Chapter 5 MEK6802D5E Evaluation System

5.1 Introduction

5.2 System Description

5.2.1 MPU

5.2.2 RAM

5.2.3 D5BUG Monitor

5.2.4 Keypad and Displays

5.2.5 Cassette Interface

5.2.6 User PIA

5.2.7 Optional User ROM/EPROM/EEPROM

5.2.8 Hardware Enhancement

5.2.9 Power Supplies

5.3 System Operation

5.3.1 Reset

5.3.2 Escape

5.3.3 Memory Display and Change

5.3.4 Register Display and Change

5.3.5 Go to User Program

5.3.6 Single-Step Operation

5.3.7 Breakpoints

5.3.8 Offset Calculation Facility

5.3.9 User-Defined Functions

5.3.10 Storing a Program on Cassette Tape

5.3.11 Loading a Program from Cassette Tape

5.3.12 Program Verification

5.4 Concluding Remarks


Chapter 6 Hands-On Investigation Using the 6802D5E Evaluation System

6.1 Introduction

6.2 Investigations

Investigation 1 Loading and Running a Simple Program

Investigation 2 Simple Programs Containing Logic Functions

Investigation 3 Single-Step Operation

Investigation 4 Verification of the Solution to Problem 3.4

Investigation 5 One-Byte Memory-Mapped Display

Investigation 6 User PIA Initialisation for Single Data-Byte Transfer

Investigation 7 User PIA Initialisation for Interrupt Inputs

Investigation 8 Monitor and Display of Active Peripheral Lines

Investigation 9 Waveform Generation

Investigation 10 Signal Processing Case Study

Investigation 11 System Enhancement with an ACIA

Investigation 12 System Enhancement with an EPROM

6.3 Concluding Remarks

Appendix 1 Instruction Set Summary

Appendix 2 Glossary of Terms

Answers to Problems



No. of pages:
© Butterworth-Heinemann 1987
1st January 1982
eBook ISBN:

About the Authors

Robert J. Simpson

Trevor J. Terrell

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