Description

All the design and development inspiration and direction a harware engineer needs in one blockbuster book! Clive "Max" Maxfield renowned author, columnist, and editor of PL DesignLine has selected the very best FPGA design material from the Newnes portfolio and has compiled it into this volume. The result is a book covering the gamut of FPGA design from design fundamentals to optimized layout techniques with a strong pragmatic emphasis. In addition to specific design techniques and practices, this book also discusses various approaches to solving FPGA design problems and how to successfully apply theory to actual design tasks. The material has been selected for its timelessness as well as for its relevance to contemporary FPGA design issues. Contents Chapter 1 Alternative FPGA Architectures Chapter 2 Design Techniques, Rules, and Guidelines Chapter 3 A VHDL Primer: The Essentials Chapter 4 Modeling Memories Chapter 5 Introduction to Synchronous State Machine Design and Analysis Chapter 6 Embedded Processors Chapter 7 Digital Signal Processing Chapter 8 Basics of Embedded Audio Processing Chapter 9 Basics of Embedded Video and Image Processing Chapter 10 Programming Streaming FPGA Applications Using Block Diagrams In Simulink Chapter 11 Ladder and functional block programming Chapter 12 Timers

Key Features

*Hand-picked content selected by Clive "Max" Maxfield, character, luminary, columnist, and author *Proven best design practices for FPGA development, verification, and low-power *Case histories and design examples get you off and running on your current project

Readership

Electronics Designers and Programmers; Application Engineers; Hardware Engineers; Software Engineers

Table of Contents

Chapter 1 Alternative FPGA Architectures 1.1 A word of warning 1.2 A little background information 1.3 Antifuse versus SRAM versus … 1.4 Fine-, medium-, and coarse-grained architectures 1.5 MUX- versus LUT-based logic blocks 1.6 CLBs versus LABs versus slices 1.7 Fast carry chains 1.8 Embedded RAMs 1.9 Embedded multipliers, adders, MACs, etc. 1.10 Embedded processor cores (hard and soft) 1.11 Clock trees and clock managers 1.12 General-purpose I/O 1.13 Gigabit transceivers 1.14 Hard IP, soft IP, and firm IP 1.15 System gates versus real gates 1.16 FPGA years Chapter 2 Design Techniques, Rules, and Guidelines 2.1 Hardware Description Languages 2.2 Top-Down Design 2.3 Synchronous Design 2.4 Floating Nodes 2.5 Bus Contention 2.6 One-Hot State Encoding 2.7 Design For Test (DFT) 2.8 Testing Redundant Logic 2.9 Initializing State Machines 2.10 Observable Nodes 2.11 Scan Techniques 2.12 Built-In Self-Test (BIST) 2.13 Signature Analysis 2.14 Summary Chapter 3 A VHDL Primer: The Essentials 3.1 Introduction 3.2 Entity: model interface 3.3 Architecture: model behavior 3.4 Process: basic functional unit in VHDL 3.5 Basic variable types and operators 3.6 Decisions and loops 3.7 Hierarchical design 3.8 Debugging models 3.9 Basic data types 3.10 Summary Chapter 4 Modeling Memories 4.1 Memory Arrays 4.2 Modeling Memory Functionality 4.3 VITAL_Memory Path

Details

No. of pages:
488
Language:
English
Copyright:
© 2009
Published:
Imprint:
Newnes
Print ISBN:
9781856176217
Electronic ISBN:
9780080950808

About the editor

Clive Maxfield

Clive "Max" Maxfield received a BS in Control Engineering from Sheffield Polytechnic, England in 1980. He began his career as a mainframe CPU designer for International Computers Limited (ICL) in Manchester, England. Max now finds himself a member of the technical staff (MTS) at Intergraph Electronics, Huntsville, Alabama. Max is the author of dozens of articles and papers appearing in magazines and at technical conferences around the world. Max's main area of interest are currently focused in the analog, digital, and mixed-signal simulation of integrated circuits and multichip modules.

Affiliations and Expertise

Engineer, TechBytes, and Editor of PLDesignline.com EDA industry consultant, EDN columnist, and Embedded Systems Guru