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Introduction to DSP and CPU; Finite length DSP; Architecture and Micro architecture design; Instruction set design ? part I; Instruction set design ? part II; ALU and Register file (RF); MAC (Multiplication and accumulation unit); Memory sub system and addressing unit; Control path; Design of tools for firmware programmers; Firmware design; Peripheral of DSP cores and processors; Accelerators; Advanced architecture ILP (Instruction level parallelism); Advanced architecture (On Chip multiple DSP cores); Design for integration; Review of the design flow and functional verification
This book provides design methods for Digital Signal Processors and Application Specific Instruction set Processors, based on the author's extensive, industrial design experience. Top-down and bottom-up design methodologies are presented, providing valuable guidance for both students and practicing design engineers.
Coverage includes design of internal-external data types, application specific instruction sets, micro architectures, including designs for datapath and control path, as well as memory sub systems. Integration and verification of a DSP-ASIP processor are discussed and reinforced with extensive examples.
- Instruction set design for application specific processors based on fast application profiling
- Micro architecture design methodology
- Micro architecture design details based on real examples
- Extendable architecture design protocols
- Design for efficient memory sub systems (minimizing on chip memory and cost)
- Real example designs based on extensive, industrial experiences
Designers of application specific, embedded digital signal processors at companies such as Ericsson, Infineon, ST Microelectronics, Analog Devices, Philips, Siemens, Texas Instruments, Broadcom, Qualcom, AGilent, NEC, Intel, AMD, Fujitsu, Sony, Toshiba, Sanyo, Samsung, etc; EE students studying to be same.
- No. of pages:
- © Morgan Kaufmann 2008
- 30th May 2008
- Morgan Kaufmann
- Hardcover ISBN:
- eBook ISBN:
Linkoping University, Sweden