1. Introduction to dark silicon and future processors
2. Revisiting processor allocation and application mapping in future CMPs in dark silicon era
3. Multi-objectivism in dark silicon age
4. Dark silicon aware resource management for many-core systems
5. Dynamic power management for dark silicon multi-core processors
6. Topology specialization for networks-on-chip in the dark silicon era
7. Emerging SRAM-based FPGA architectures in dark silicon Era
Dark Silicon and the Future of On-chip Systems, Volume 110, the latest release in the Advances in Computers series published since 1960, presents detailed coverage of innovations in computer hardware, software, theory, design and applications, with this release focusing on an Introduction to dark silicon and future processors, a Revisiting of processor allocation and application mapping in future CMPs in the dark silicon era, Multi-objectivism in the dark silicon age, Dark silicon aware resource management for many-core systems, Dynamic power management for dark silicon multi-core processors, Topology specialization for networks-on-chip in the dark silicon era, and Emerging SRAM-based FPGA architectures.
- Provides in-depth surveys and tutorials on new computer technology
- Covers well-known authors and researchers in the field
- Presents extensive bibliographies with most chapters
- Includes volumes that are devoted to single themes or subfields of computer science, with this release focusing on Dark Silicon and Future On-chip Systems
Researchers in high performance computer areas, hardware manufacturers, educational programs in physics and scientific computation and in computer science
- No. of pages:
- © Academic Press 2018
- 1st August 2018
- Academic Press
- Hardcover ISBN:
A. R. Hurson is currently a professor and Chair of Computer Science department at Missouri S&T. Before joining Missouri S&T, he was a professor of Computer Science and Engineering department at The Pennsylvania State University. His research for the past 30 years has been directed toward the design and analysis of general as well as special purpose computer architectures. His research has been supported by NSF, DARPA, the Department of Education, the Air Force, the Office of Naval Research, Oak Ridge National Laboratory, NCR Corp., General Electric, IBM, Lockheed Martin, Pennsylvania State University, and Missouri S & T. He has published over 300 technical papers in areas including multidatabases, global information sharing and processing, application of mobile agent technology, object oriented databases, mobile and pervasive computing environment, sensor and ad-hoc networks, computer architecture and cache memory, parallel and distributed processing, dataflow architectures, and VLSI algorithms. Dr. Hurson served as the Guest Co-Editor of special issues of the IEEE Proceedings on Supercomputing Technology, the Journal of Parallel and Distributed Computing on Load Balancing and Scheduling, the journal of integrated computer-aided engineering on multidatabase and interoperable systems, IEEE Transactions on Computers on Parallel Architectures and Compilation Techniques, Journal of Multimedia Tools and Applications, and Journal of Pervasive and Mobile Computing. He is the co-author of the IEEE Tutorials on Parallel Architectures for Database Systems, Multidatabase systems: An advanced solution for global information sharing, Parallel architectures for data/knowledge base systems, and Scheduling and Load Balancing in Parallel and Distributed Systems. He is also the guest Editor of advances in computers for Parallel, Distributed, and Pervasive Computing. Hurson is the Co-founder of the IEEE Symposium on Parallel and Distributed Processing (currently IPDPS) and IEEE conference on Pervasive Computing and Communications.
Professor Hurson has been active in various IEEE/ACM Conferences and has given tutorials and invited lectures for various conferences and organizations on global information sharing, database management systems, supercomputer technology, data/knowledge-based systems, dataflow processing, scheduling and load balancing, parallel computing, and Pervasive computing. He served as a member of the IEEE Computer Society Press Editorial Board, an IEEE Distinguished speaker, editor of IEEE transactions on computers, editor of Journal of Pervasive and Mobile Computing, and IEEE/ACM Computer Sciences Accreditation Board. Currently, he is serving as an ACM distinguished speaker, area editor CSI Journal of Computer Science and Engineering, and Co-Editor-in-Chief Advances in Computers.
Missouri University of Science and Technology, Rolla, MO, USA
Professor Hamid Sarbazi-Azad, Ph.D. is currently a professor at the department of computer engineering of Sharif University of Technology, and heads the IPM School of Computer Science, Tehran, Iran. His research interests include high-performance computer architectures, NoCs and SoCs, multicore systems, GPUs, and memory architectures. He is an associate editor/editorial board member of several journals including IEEE Transactions on Computers and ACM Computing Surveys. He received his PhD in computing science from the University of Glasgow, Glasgow, UK, in 2002
Sharif University of Technology, Tehran, Iran