Computer Programming and Architecture - 2nd Edition - ISBN: 9781555580155, 9781483299372

Computer Programming and Architecture

2nd Edition

The Vax

Authors: Henry Levy Richard Eckhouse
eBook ISBN: 9781483299372
Imprint: Digital Press
Published Date: 15th September 1988
Page Count: 444
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Description

Takes a unique systems approach to programming and architecture of the VAX

Using the VAX as a detailed example, the first half of this book offers a complete course in assembly language programming. The second describes higher-level systems issues in computer architecture. Highlights include the VAX assembler and debugger, other modern architectures such as RISCs, multiprocessing and parallel computing, microprogramming, caches and translation buffers, and an appendix on the Berkeley UNIX assembler.

Readership

Software programmers intersted in VAX hardware

Table of Contents


Preface

I Architecture and Implementation

Organization of This Book

Review of Number Systems

Number Systems

Binary and Hexadecimal Representations

Negative Numbers

Exercises

2 Computer Structures and the VAX

Computer Structures

The Memory

The Central Processing Unit

Instruction Execution

Classes of Instruction Architectures

The Input/Output System

Describing Computer Structures

Introduction to the VAX

VAX Information Units and Data Types

Integers

Floating-Point Numbers

Alphanumeric Characters

Decimal Strings

Summary of Data Types

Summary

Exercises

3 The Program Assembler and Debugger

Assembler Statement Types

VAX Instruction Format

The Functions of a Symbolic Assembler

The Location Counter

Symbols

Constants

Storage Allocation

Storing Strings

Expressions

Control Statements

Labels

The Listing

The Assembly Process

The Program Debugger

Using the Debugger

Examining and Depositing

Basic Control Flow

Setting Breakpoints, Watchpoints, and Tracepoints

Using the Screen

First Program Example: Simple Output

Conventions for Writing Programs

Exercises

4 Instruction and Addressing Fundamentals

VAX Instruction Characteristics

Generic Operations

Control Flow

Operand-Addressing Techniques

Simple Addressing

Immediate Mode

General-Purpose Registers

Indirect Mode

Register Autoincrement and Autodecrement Modes

Operand Context

Displacement Mode

Index Mode

A Simple Example

Exercises

5 VAX Instruction Encoding

General Instruction Format

Encoding an Instruction

Program-Counter Relative Addressing

Immediate Addressing

Absolute Addressing

Branch Addressing

Summary

Exercises

5 Advanced Control Structures

The Jump Instruction

Case Statements

Loops

The Stack

Subroutines and Procedures

Argument Lists and Call Instructions

The Argument Pointer

Saving Registers

An Example Procedure

The Call Frame

Local Variables

Fast Linkages

Recursion

Reentrant Routines

Macros

Creating Local Labels

Macro Calls within Macro Definitions

Argument Concatenation

Repeat Blocks

Conditional Assembly

Summary

Exercises

7 More VAX Data Types

Bits and Bit Fields

Logical Bit Instructions

Single-Bit Instructions

Variable-Length Bit Fields

Converting Integer Data Types

Character Strings

Packed Decimal String Instructions

Multiple-Precision Integer Arithmetic

Floating-Point Arithmetic

Exercises

8 Linked Data Structures

Multi-Element Structures and Records

Arrays

Circular Lists

Linked Lists

Doubly Linked Lists

Self-Relative Queues

Trees

Summary

Exercises

9 Analysis of the VAX Instruction Set

Exercises

1 0 Comparative Architectures

General Issues in Instruction Set Design

The IBM System 360/370

The CDC Cyber Series

The Intel 80386 Microprocessor

Reduced Instruction Set Computers

Berkeley RISC II

Summary

Exercises

11 Physical Input and Output

I/O Processing

Control and Status Registers and I/O Space

Low-Speed Devices

The Line Printer

Terminal Multiplexing

High-Speed Devices

Magnetic Disks

Simplified Disk Control

Magnetic Tape

Mass Storage Control Protocol Networks

The Initial Bootstrap Problem

Summary

Exercises

1 2 The Support of an Operating System

Sharing the Processor

Sharing the Memory

Processes

Processor Access Modes

Process Access Mode Stacks

Changing Modes

Checking for Accessibility

Process Context Switching

Summary of Process Concepts

VAX Memory Management

VAX Memory Structure

VAX Page Tables

VAX Address-Space Regions

System Space

Process Space

Privileged Processor Registers

Summary of Memory Management Concepts

Interrupt and Exception Handling

Interrupts and Exceptions

Interrupts

Exceptions

Interrupt and Exception Vectors

Software Interrupts

Summary of Condition and Exception Handling

Summary

Exercises

1 3 T h e Structure of a VAX Operating System

Process Scheduling

VMS Process Scheduling

VMS Scheduler Context-Switch Example

Process Paging

VMS Memory Management

Paging under VMS

Swapping under VMS

Input and Output Processing

The VMS I/O System

VMS I/O Database

VMS I/O System Components

I/O Control Flow

The Use of Interrupt Priority Levels

Synchronizing I/O Database Access

System Service Implementation

Summary

Exercises

1 4 Caches and Translation Buffers

Choice of Memory Technology and Structure

The Fastest Technology Approach

Cache Memory Approach

Associative Memories and Cache Organization

Issues in Cache Design

Cache Coherency in Multiprocessors

Multilevel Caches

An Example Cache Organization: The VAX 6200

The Translation Buffer

The Instruction Buffer

Summary

Exercises

1 5 Microprogramming

Instruction to Microprogramming

Organization of a Simple Micromachine

The Data Path in a Simple Machine

The Control Unit in a Simple Machine

The MicroVAX I Microarchitecture

The MicroVAX I Data Path

MicroVAX I Data-Path Control

Microinstruction Branching

Execution of a VAX Instruction

Microarchitecture Alternatives

Exercises

1 6 Parallelism and Parallel Computer Systems

Classifying Multicomputer Systems

Pipelined Processors

Multiple Functional Units and Hazards

Vector Machines: The Cray-1

Multiprocessors

Multiprocessor Organizations

What Is Required for Multiprocessing?

Examples of Multiprocessor Systems

The Connection Machine: A Highly Parallel SIMD Machine

The Butterfly: An Interconnection Network Machine

MIMD Hypercube Machines

Summary

Exercises

Appendix A The Ultrix Assembler

Appendix B VAX Instruction Set Description

Bibliography

Index

Details

No. of pages:
444
Language:
English
Copyright:
© Digital Press 1989
Published:
Imprint:
Digital Press
eBook ISBN:
9781483299372

About the Author

Henry Levy

Affiliations and Expertise

University of Washington

Richard Eckhouse

Affiliations and Expertise

University of Massachusetts