Advanced MOS Device Physics

1st Edition - December 28, 1988
Editor: Norman Einspruch
Language: English
eBook ISBN:
9 7 8 - 0 - 3 2 3 - 1 5 3 1 3 - 3

VLSI Electronics Microstructure Science, Volume 18: Advanced MOS Device Physics explores several device physics topics related to metal oxide semiconductor (MOS) technology. The… Read more

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VLSI Electronics Microstructure Science, Volume 18: Advanced MOS Device Physics explores several device physics topics related to metal oxide semiconductor (MOS) technology. The emphasis is on physical description, modeling, and technological implications rather than on the formal aspects of device theory. Special attention is paid to the reliability physics of small-geometry MOSFETs. Comprised of eight chapters, this volume begins with a general picture of MOS technology development from the device and processing points of view. The critical issue of hot-carrier effects is discussed, along with the device engineering aspects of this problem; the emerging low-temperature MOS technology; and the problem of latchup in scaled MOS circuits. Several device models that are suitable for use in circuit simulators are also described. The last chapter examines novel electron transport effects observed in ultra-small MOS structures. This book should prove useful to semiconductor engineers involved in different aspects of MOS technology development, as well as for researchers in this field and students of the corresponding disciplines.

List of Contributors

Preface

Chapter 1 Approaches to Scaling

I. Introduction

II. A Review of One-Dimensional MOSFET Drain Current Models

III. A Short-Channel MOS Drain Current Model

IV. Summary

References

Chapter 2 Current Trends in MOS Process Integration

I. Introduction

II. n-Channel MOS Transistors for CMOS or NMOS Technologies

III. p-Channel MOS Transistors

IV. Well Formation for CMOS

V. MOS Device Isolation

VI. Merged Bipolar/CMOS BiCMOS Processes

VII. Silicon-on-Insulator Technologies

References

Chapter 3 Hot Carrier Effects

I. Introduction

II. Channel Electric Field

III. Substrate Current Model

IV. Ydsat and Isub Dependence on Vg and L

V. Gate Current and Lucky Electron Model

VI. Thermionic Gate Current Model

VII. Hot Carrier Mean Free Path and Temperature

VIII. Effect of Non-Maxwellian Assumption

Chapter 4 Hot-Carrier-Resistant Structures

I. Introduction

II. Electric Field Reduction

III. Graded Drain Structures

IV. Gate-to-Source/Drain Overlap

V. Device Processing Variations

VI. Circuit Design Considerations

VII. Optimization and Trade-Offs

References

Chapter 5 Low-Temperature CMOS

I. Introduction

II. Low-Temperature Device Physics

III. Material Properties

IV. Device Reliability Issues

V. Circuit and System Performance

References

Chapter 6 MOSFET Modeling for Circuit Simulation

I. Introduction

II. Current-Voltage Characteristics

III. Capacitance Characteristics

IV. Parasitic Elements

V. Parameter Extraction

VI. Summary

Appendix A

Appendix B

References

Chapter 7 Latchup

I. Introduction

II. Latchup Fundamentals

III. Practical Methods of Circuit Evaluation

IV. Latchup Prevention Techniques

References

Chapter 8 Quantum Mechanical and Nonstationary Transport Phenomena in Nanostructured Silicon Inversion Layers

I. Introduction

II. Semiclassical Conductivity of Quantum MOS Devices

III. Quasi-One-Dimensional MOSFETS

IV. Surface Superlattice Transistors

V. Dynamics of Electron Transport in High Electric Fields

References

Index