Electronic Design Automation

Synthesis, Verification, and Test

Edited by

  • Laung-Terng Wang, SynTest Technologies, Inc., Sunnyvale, CA, USA
  • Yao-Wen Chang, National Taiwan University, Taipai, Taiwan
  • Kwang-Ting (Tim) Cheng, University of California, Santa Barbara, USA

This book provides broad and comprehensive coverage of the entire EDA flow. EDA/VLSI practitioners and researchers in need of fluency in an "adjacent" field will find this an invaluable reference to the basic EDA concepts, principles, data structures, algorithms, and architectures for the design, verification, and test of VLSI circuits. Anyone who needs to learn the concepts, principles, data structures, algorithms, and architectures of the EDA flow will benefit from this book.
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Practitioners/Researchers in electronic design automation, including VLSI design engineers, verfication engineers, and test engineers.


Book information

  • Published: February 2009
  • ISBN: 978-0-12-374364-0

Table of Contents

Chapter 1: Introduction
Chapter 2: Fundamentals of CMOS Design
Chapter 3: Design for Testability
Chapter 4: Fundamentals of Algorithms
Chapter 5: Electronic System-Level Design and High-Level Synthesis
Chapter 6: Logic Synthesis in a Nutshell
Chapter 7: Test Synthesis
Chapter 8: Logic and Circuit Simulation
Chapter 9: Functional Verification
Chapter 10: Floorplanning
Chapter 11: Placement
Chapter 12: Global and Detailed Routing
Chapter 13: Synthesis of Clock and Power/Ground Networks
Chapter 14: Fault Simulation and Test Generation.