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CIRCUIT DESIGN: KNOW IT ALL
Circuit Design: Know It All
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By
Darren Ashby, Electronics Product Line Manager, ICON Fitness, one of the world's largest consumers of embedded chips, Salt Lake City, UT, USA
Bonnie Baker, Columnist for EDN Magazine's "Baker's Best"
Ian Hickman, EUR.ING, BSc Hons, C. Eng, MIEE, MIEEE, Electronics author and freelance journalist
Walt Kester, Analog Devices technical staff
Robert Pease, National Semiconductor Corporation
Tim Williams, Elmac Services, Wareham, UK
Bob Zeidman

Included in series
Newnes Know It All,

Audience
Electronics Engineers; Circuit Designers; Communication Engineers

Contents
Chapter 1 The Fundamentals 1.1 Electrical fundamentals 1.2 Passive components 1.3 D.C. circuits 1.4 Alternating voltage and current 1.5 Circuit simulation 1.6 Intuitive Circuit Design 1.7 Learn an Intuitive Approach 1.8 ?Lego? Engineering 1.9 Troubleshooting Circuits References Chapter 2 The Semiconductor diode References Chapter 3 Understanding diodes and their problems 3.1 Speed Demons 3.2 Turn 'Em Off-Turn 'Em On? 3.3 Other Strange Things That Diodes Can Do to You? 3.4 Zener, Zener, Zener? 3.5 Diodes That Glow in the Dark, Efficiently 3.6 Solar Cells 3.7 Assault and Battery References Chapter 4 Bipolar transistors References Chapter 5 Field effect transistors References Chapter 6 Identifying and avoiding transistor problems 6.1 More Beta-More Better? 6.2 Field Effect Transistors 6.3 Power Transistors May Hog Current 6.4 Apply the 5-Second Rule 6.5 Fabrication Structures Make a Difference 6.6 Power-Circuit Design Requires Expertise 6.7 MOSFETS Avoid Secondary Breakdown References Chapter 7 Fundamentals 7.1 Digital Technology References Chapter 8 Number Systems 8.1 Introduction 8.2. Decimal?Unsigned Binary Conversion 8.3 Signed Binary Numbers 8.4 Gray Code 8.5 Binary Coded Decimal 8.6 Octal-Binary Conversion 8.7. Hexadecimal-Binary Conversion Chapter 9 Binary Data Manipulation 9.1 Introduction 9.2 Logical Operations 9.3 Boolean Algebra 9.4 Combinational Logic Gates 9.5 Truth Tables References Chapter 10 Combinational Logic Design 10.1 Introduction 10.2 NAND and NOR logic 10.3 Karnaugh Maps 10.4 Don't Care Conditions References Chapter 11 Sequential Logic Design 11.1 Introduction 11.2 Level Sensitive Latches and Edge-Triggered Flip-Flops 11.3 The D Latch and D-Type Flip-Flop 11.4 Counter Design 11.5 State Machine Design 11.6 Moore versus Mealy State Machines 11.7 Shift Registers 11.8 Digital Scan Path References Chapter 12 Memory 12.1 Introduction 12.2 Random Access Memory 12.3 Read-Only Memory Chapter 13 Selecting a design route 13.1 Introduction 13.2 DISCRETE IMPLEMENTATION 13.3 MASK PROGRAMMABLE ASICs 13.4 FIELD PROGRAMMABLE LOGIC 13.5 VHDL 13.6 CHOOSING A DESIGN ROUTE Chapter 14 Designing with logic ICs 14.1 Logic ICs Chapter 15 Interfacing 15.1 Mixing analogue and digital 15.2 Generating digital levels from analogue inputs 15.3 Protection against externally-applied overvoltages 15.4 Isolation 15.5 Classic data interface standards 15.6 High performance data interface standards Chapter 16 DSP and digital filters 16.1 Origins of Real-World Signals and Their Units of Measurement 16.2 Reasons for Processing Real-World Signals 16.3 Generation of Real-World Signals 16.4 Methods and Technologies Available for Processing Real-World Signals 16.5 Analog Versus Digital Signal Processing 16.6 A Practical Example 16.7 Finite Impulse Response (FIR) Filters 16.8 FIR Filter Implementation in DSP Hardware Using Circular Buffering 16.9 Designing FIR Filters 16.10 Infinite Impulse Response (IIR) Filters 16.11 IIR Filter Design Techniques 16.12 Multirate Filters 16.13 Adaptive Filters References Chapter 17 Dealing with high speed logic References on Dealing with High Speed Logic Chapter 18 Bridging the Gap Between Analog and Digital 18.1 Try to Measure Temperature Digitally 18.2 Road Blocks Abound 18.3 The Ultimate Key to Analog Success 18.4 How Analog and Digital Design Differ 18.5 Time and Its Inversion 18.6 Organizing Your Toolbox 18.7 Set Your Foundation and Move On, Out of the Box References Chapter 19 Op Amps 19.1 The.Magical.Mysterious.Op-Amp 19.2 Understanding Op Amp Parameters 19.3 Additional Parameter Information 19.4 Modeling Op Amps 19.5 Finding the Perfect Op Amp References Chapter 20 Converters-Analog Meets Digital 20.1 ADCs 20.2 Types of ADCs 20.3 ADC Comparison 20.4 Sample and Hold 20.5 Real Parts 20.6 Microprocessor Interfacing 20.7 Clocked Interfaces 20.8 Serial Interfaces 20.9 Multichannel ADCs 20.10 Internal Microcontroller ADCs 20.11 Codecs 20.12 Interrupt Rates 20.13 Dual-Function Pins on Microcontrollers 20.14 Design Checklist Chapter 21 Sensors 21.1 Instrumentation and control systems 21.2 Transducers 21.3 Sensors 21.4 Switches 21.5 Semiconductor temperature sensors 21.6 Thermocouples 21.7 Threshold detection 21.8 Outputs 21.9 LED indicators 21.10 Driving high-current loads 21.11 Audible outputs 21.12 Motors 21.13 Driving mains connected loads Chapter 22 Active filters 22.1 Introduction 22.2 Fundamentals of Low-Pass Filters 22.3 Low-Pass Filter Design 22.4 High-Pass Filter Design 22.5 Band-Pass Filter Design 22.6 Band-Rejection Filter Design 22.7 All-Pass Filter Design 22.8 Practical Design Hints 22.9 Filter Coefficient Tables References Chapter 23 Radio-Frequency (RF) Circuits 23.1 Modulation of radio waves 23.2 Low-power RF amplifiers 23.3 Stability 23.4 Linearity 23.5 Noise and dynamic range 23.6 Impedances and gain 23.7 Mixers 23.8 Demodulators 23.9 Oscillators References Chapter 24 Signal Sources 24.1 Voltage references 24.2 Non-sinusoidaI waveform generators 24.3 Sine wave generators 24.4 Voltage-controlled oscillators and phase detectors References Chapter 25 EDA Design Tools for Analog and RF 25.1 The Old Pencil and Paper Design Process 25.2 Is Your Simulation Fundamentally Valid? 25.3 Macromodels: What Can They Do? 25.4 Concluding Remarks 25.5 VHDL-AMS 25.6 Summary References Chapter 26 Useful Circuits 26.1 Introduction 26.2 Boundary Conditions 26.3 Amplifiers 26.4 Computing Circuits 26.5 Oscillators 26.6 Some.of.My.Favorite.Circuits. References Chapter 27 Programmable Logic to ASICs 27.1 Programmable Read Only Memories (PROMs) 27.2 Programmable Logic Arrays (PLAs) 27.3 Programmable Array Logic (PALs) 27.4 The Masked Gate Array ASIC 27.5 CPLDs and FPGAs 27.6 Summary References Chapter 28 Complex Programmable Logic Devices (CPLDs) 28.1 CPLD Architectures 28.2 Function Blocks 28.3 I/O Blocks 28.4 Clock Drivers 28.5 Interconnect 28.6 CPLD Technology and Programmable Elements 28.7 Embedded Devices 28.8 Summary: CPLD Selection Criteria References Chapter 29 Field Programmable Gate Arrays (FPGAs) 29.1 FPGA Architectures 29.2 Configurable Logic Blocks 29.3 Configurable I/O Blocks 29.4 Embedded Devices 29.5 Programmable Interconnect 29.6 Clock Circuitry 29.7 SRAM vs. Antifuse Programming 29.8 Emulating and Prototyping ASICs 29.9 Summary References Chapter 30 Design Automation and Testing for FPGAs 30.1 Simulation 30.2 Simple test bench: instantiating components 30.3 Libraries 30.4 Synthesis 30.5 Physical design flow 30.6 Place and route 30.7 Timing analysis 30.8 Design pitfalls 30.9 VHDL issues for FPGA design 30.10 Summary References Chapter 31 Integrating processors onto FPGAs 31.1 Introduction 31.2 A simple embedded processor 31.3 Soft core processors on an FPGA 31.4 Summary Chapter 32 Implementing digital filters in VHDL 32.1 Introduction 32.2 Converting S-domain to Z-domain 32.3 Implementing Z-domain functions in VHDL 32.4 Basic low pass filter model 32.5 FIR filters 32.6 IIR filters 32.7 Summary Chapter 33 Overview 33.1 Microprocessor systems 33.2 Single-chip microcomputers 33.3 Microcontrollers 33.4 Microprocessor systems 33.5 Data types 33.6 Data storage 33.7 Microprocessor operation 33.8 A microcontroller system Chapter 34 Microcontroller Toolbox 34.1 Microcontroller Supply and Reference 34.2 Resistor Networks 34.3 Multiple Input Control 34.4 AC Control 34.5 Voltage Monitors and Supervisory Circuits 34.6 Driving Bipolar Transistors 34.7 Driving MOSFETs 34.8 Reading Negative Voltages 34.9 Example Control System Chapter 35 Overview 35.1 Power.Supplies Chapter 36 Specifications Chapter 37 Off the shelf versus roll your own 37.1 Costs Chapter 38 Input and output parameters 38.1 Voltage 38.2 Current 38.3 Fuses 38.4 Switch-on surge, or inrush current 38.5 Waveform distortion and interference 38.6 Frequency 38.7 Efficiency 38.8 Deriving the input voltage from the output 38.9 Low-load condition 38.10 Rectifier and capacitor selection 38.11 Load and line regulation 38.12 Ripple and noise 38.13 Transient response Chapter 39 Batteries 39.1 Initial considerations 39.2 Primary cells 39.3 Secondary cells 39.4 Charging Chapter 40 Layout and Grounding for Analog and Digital Circuits 40.1 The Similarities of Analog and Digital Layout Practices 40.2 Where the Domains Differ – Ground Planes Can Be a Problem 40.3 Where the Board and Component Parasitics Can Do the Most Damage 40.4 Layout Techniques That Improve ADC Accuracy and Resolution 40.5 The Art of Laying Out Two-Layer Boards 40.6 Current Return Paths With or Without a Ground Plane 40.7 Layout Tricks for a 12-Bit Sensing System 40.8 General Layout Guidelines – Device Placement 40.9 General Layout Guidelines – Ground and Power Supply Strategy 40.10 Signal Traces 40.11 Did I Say Bypass and Use an Anti-Aliasing Filter? 40.12 Bypass Capacitors 40.13 Anti-Aliasing Filters 40.14 PCB Design Checklist References Chapter 41 Safety 41.1 Safety classes 41.2 Insulation types 41.3 Design considerations for safety protection 41.4 Fire hazard Chapter 42 Design for Production 42.1 Checklist 42.2 The dangers of ESD Chapter 43 Testability 43.1 In-circuit testing 43.2 Functional testing 43.3 Boundary scan and JTAG 43.4 Design techniques Chapter 44 Reliability 44.1 Definitions 44.2 The cost of reliability 44.3 Design for reliability 44.4 The value of MTBF figures 44.5 Design faults Chapter 45 Thermal Management 45.1 Using thermal resistance 45.2 Heatsinks 45.3 Power semiconductor mounting 45.4 Placement and layout Appendix A Standards A.1 British standards A.2 IEC standards

Bibliographic details
Paperback, 1248 pages, publication date: AUG-2008
ISBN-13: 978-1-85617-527-2
Imprint: NEWNES

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Last update: 25 Nov 2009
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