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LOW-POWER DESIGN OF NANOMETER FPGAS
Low-Power Design of Nanometer FPGAs
Architecture and EDA
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By
Hassan Hassan
Mohab Anis

Included in series
Systems on Silicon,

Description
Low-Power Design of Nanometer FPGAs Architecture and EDA is an invaluable reference for researchers and practicing engineers concerned with power-efficient, FPGA design. State-of-the-art power reduction techniques for FPGAs will be described and compared. These techniques can be applied at the circuit, architecture, and electronic design automation levels to describe both the dynamic and leakage power sources and enable strategies for codesign.

Audience
Researchers, Circuit-Design Professionals, and EE/ECE Graduate Students concerned with low-power FPGA design. This includes designers at companies globally such as Xilinx, Altera, Actel, Cypress, Lattice Semiconductor, TI, Mentor Graphics, Cadence, Synopsis, Magma, Quicklogic, National Semiconductor, and Freescale.

Contents
FPGA Architectures; Power Consumption in Nanometer FPGAs; Power Modeling and Estimation Techniques in FPGAs; Dynamic Power Reduction; Leakage Power Reduction; Low-Power FPGA Design in Future CMOS Technologies.

Bibliographic details
Hardbound, 256 pages, publication date: SEP-2009
ISBN-13: 978-0-12-374438-8
Imprint: MORGAN KAUFFMAN

Price and Ordering
Price:
USD 99.95
EUR 70.95
GBP 60.99
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Last update: 25 Nov 2009
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