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VERIFICATION TECHNIQUES FOR SYSTEM-LEVEL DESIGN
Verification Techniques for System-Level Design
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By
Masahiro Fujita, Professor, VLSI Design & Education Center, University of Tokyo, Japan.
Indradeep Ghosh, Senior Researcher, Fujitsu Labs of America, Sunnyvale, CA, USA.
Mukul Prasad, Senior Researcher, Fujitsu Labs of America, Sunnyvale, CA, USA.

Included in series
Systems on Silicon,

Audience
PRIMARY: Practitioners/Researchers in System-Level Design and Verification; Design Engineers at companies such as Synopsis, Cadence, Intel. SECONDARY: Reference for graduate-level courses in SoC design and verification.

Bibliographic details
Hardbound, 256 pages, publication date: OCT-2007
ISBN-13: 978-0-12-370616-4
ISBN-10: 0-12-370616-5
Imprint: MORGAN KAUFFMAN

Price and Ordering
Price:
EUR 68.95
GBP 52
USD 83.95
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Last update: 13 Jun 2009
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