Networks on Chips

Technology and Tools

Networks on Chips on ScienceDirect(Opens new window)
Hardbound, 408 Pages
Published: JUL-2006
ISBN 10: 0-12-370521-5
ISBN 13: 978-0-12-370521-1
Imprint: MORGAN KAUFMANN



Davide Bertozzi, University of Ferrara
Israel Cidon, Technion--Israel Institute of Technology
Kees Goossens, Philips Research Laboratories
Kwanho Kim, Korea Advanced Institute of Science and Technology (KAIST)
Kangmin Lee, Korea Advanced Institute of Science and Technology (KAIST)
Se-Joong Lee, Korea Advanced Institute of Science and Technology (KAIST)
Srinivasan Murali, Stanford University
Hoi-Jun Yoo, Korea Advanced Institute of Science & Technology (KAIST)
Luca Benini, University of Bologna, Italy.

By
Giovanni De Micheli, École Polytechnique Fédérale de Lausanne, Switzerland
Luca Benini, University of Bologna, Italy.

Description
The design of today's semiconductor chips for various applications, such as telecommunications, poses various challenges due to the complexity of these systems. These highly complex systems-on-chips demand new approaches to connect and manage the communication between on-chip processing and storage components and networks on chips (NoCs) provide a powerful solution. This book is the first to provide a unified overview of NoC technology. It includes in-depth analysis of all the on-chip communication challenges, from physical wiring implementation up to software architecture, and a complete classification of their various Network-on-Chip approaches and solutions.

Included in series
Systems on Silicon

Audience:
Primary: Researchers/Practitioners in Multiprocessor Systems on Chips; Networks on Chips. VLSI design companies (ST Microelectronics, Arteris, etc.) involved currently with implementing NoCs on silicon. Secondary: Graduate-level courses in System on Chip design.


 
Last update: 5 Nov 2011