Khader S. Abdel-Hafez, SynTest Technologies, Inc.
Soumendu Bhattacharya, Georgia Institute of Technology
Abhijit Chatterjee, Georgia Institute of Technology
Xinghao Chen, City University of New York
Kwang-Ting (Tim) Cheng, University of California, Santa Barbara, USA
William Eklow, Cisco Systems, Inc.
Michael S. Hsiao, Virginia Tech
Jiun-Lang Huang, National Taiwan University
Shi-Yu Huang, National Tsing Hua University
Wen-Ben Jone, University of Cincinnati
Rohit Kapur, Synopsys, Inc.
Brion Keller, Cadence Design Systems, Inc.
Kuen-Jong Lee, National Cheng Kung University
James C.-M. Li, National Taiwan University
Mike Peng Li, Wavecrest Corporation
Xiaowei Li, Chinese Academy of Sciences
T.M. Mak, Intel Corporation
Yinghua Min, Chinese Academy of Sciences
Benoit Nadeau-Dostie, LogicVision, Inc.
Mehrdad Nourani, University of Texas at Dallas
Janusz Rajski, Mentor Graphics
Charles Stroud, Auburn University
Erik H. Volkerink, Agilent Technologies, Inc.
Duncan M. (Hank) Walker, Texas A&M University
Shianling Wu, SynTest Technologies, Inc.
Nur Touba, University of Texas, Austin, TX, U.S.A.
Laung-Terng Wang, SynTest Technologies, Inc., Sunnyvale, CA, USA
Cheng-Wen Wu, National Tsing Hua University, Hsinchu, Taiwan.
Xiaoqing Wen, Kyushu Institute of Technology, Fukuoka, Japan.
Description
This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down
test cost, improve product quality and yield, and speed up time-to-market and time-to-volume.
Audience:
PRIMARY: Practitioners/Researchers in VLSI Design and Testing; Design or Test Engineers, as well as research institutes.
SECONDARY: Undergraduate and graduate-level courses in Electronic Testing, Digital Systems Testing, Digital Logic Test & Simulation,
and VLSI Design.
