By
Andreas Meyer, Verification Architect,
Cadence Design Systems
Description
As design complexity in chips and devices continues to rise, so, too, does the demand for functional verification. Principles of Functional
Verification is a hands-on, practical text that will help train professionals in the field of engineering on the methodology and approaches
to verification.
In practice, the architectural intent of a device is necessarily abstract. The implementation process, however, must
define the detailed mechanisms to achieve the architectural goals. Based on a decade of experience, Principles of Functional Verification
intends to pinpoint the issues, provide strategies to solve the issues, and present practical applications for narrowing the gap between
architectural intent and implementation.
The book is divided into three parts, each building upon the chapters within the previous
part. Part One addresses why functional verification is necessary, its definition and goals. In Part Two, the heart of the methodology
and approaches to solving verification issues are examined. Each chapter in this part ends with exercises to apply what was discussed
in the chapter. Part Three looks at practical applications, discussing project planning, resource requirements, and costs. Each chapter
throughout all three parts will open with Key Objectives, focal points the reader can expect to review in the chapter.
Audience:
Electrical Engineers, Computer & Systems Design Engineers; Electronics Designers & Students
