Integration, the VLSI Journal

Integration, the VLSI Journal - ISSN 0167-9260
Source Normalized Impact per Paper (SNIP): 1.019 Source Normalized Impact per Paper (SNIP):
SNIP measures contextual citation impact by weighting citations based on the total number of citations in a subject field.
SCImago Journal Rank (SJR): 0.241 SCImago Journal Rank (SJR):
SJR is a prestige metric based on the idea that not all citations are the same. SJR uses a similar algorithm as the Google page rank; it provides a quantitative and a qualitative measure of the journal’s impact.
Impact Factor: 1 (2016) Impact Factor:
The Impact Factor measures the average number of citations received in a particular year by papers published in the journal during the two preceding years.
© 2017 Journal Citation Reports ® (Clarivate Analytics, 2017)
5 Year Impact Factor: 0.978 (2016) Five-Year Impact Factor:
To calculate the five year Impact Factor, citations are counted in 2016 to the previous five years and divided by the source items published in the previous five years.
© 2017 Journal Citation Reports ® (Clarivate Analytics, 2017)
Volumes: Volumes 60-63
Issues: 4 issues
ISSN: 01679260

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Description

Integration's aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics:

Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.

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