The Definitive Guide to the ARM Cortex-M3 - 1st Edition - ISBN: 9780750685344, 9780080551432

The Definitive Guide to the ARM Cortex-M3

1st Edition

Authors: Joseph Yiu Joseph Yiu
eBook ISBN: 9780080551432
Paperback ISBN: 9780750685344
Imprint: Newnes
Published Date: 21st August 2007
Page Count: 384
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Description

This user's guide does far more than simply outline the ARM Cortex-M3 CPU features; it explains step-by-step how to program and implement the processor in real-world designs. It teaches readers how to utilize the complete and thumb instruction sets in order to obtain the best functionality, efficiency, and reuseability. The author, an ARM engineer who helped develop the core, provides many examples and diagrams that aid understanding. Quick reference appendices make locating specific details a snap!

Whole chapters are dedicated to: Debugging using the new CoreSight technology Migrating effectively from the ARM7 The Memory Protection Unit Interfaces, Exceptions,Interrupts ...and much more!

Key Features

*The only available guide to programming and using the groundbreaking ARM Cortex-M3 processor

*Easy-to-understand examples, diagrams, quick reference appendices, full instruction and Thumb-2 instruction sets are all included

*The author, an ARM engineer on the M3 development team, teaches end users how to start from the ground up with the M3, and how to migrate from the ARM7

Readership

Embedded Software, Hardware and Systems Engineers, Programmers, Designers, Developers and Architects, Embedded Product Developers, Upper-level Undergraduate and Graduate Students in Electrical & Computer Engineering

Table of Contents

Chapter 1 - Introduction
What is the Cortex-M3 Processor? Background of ARM and ARM Architecture
Background Architecture Versions
Processor Naming Instruction Set development
Thumb®-2 Instruction Set Cortex-M3 processor applications
Organization of this book Further Reading
Chapter 2 - Overview of the Cortex-M3 Processor
Fundamental
Registers Operation Modes
Built-in Nested Vectored Interrupt Controller Memory Map
Bus Interface Memory Protection Unit (MPU)
Instruction Set Interrupt & Exception
Debug support Characteristics Summary
Chapter 3 – Cortex-M3 Processor Basics
Registers Special registers
Operation Mode Exceptions and Interrupts
Vector Table Stack memory operations
Reset sequence
Chapter 4 – Instruction Set
Assembly basics
Assembler language – Basic syntax Assembler language – Use of Suffixes
Assembler language – Unified Assembler Language Instruction list
16-bit data processing instructions 16-bit branch instructions
16-bit Load and Store instructions Other 16-bit instructions
32-bit data processing instructions 32-bit Load and Store instructions
32-bit Branch instructions Other 32-bit instructions
Unsupported Instructions Instruction Descriptions
Several useful instructions in the Cortex-M3 processor MSR, MRS
IT (If Then) CBZ, CBNZ
SDIV, UDIV REV, REVH, REVSH
RBIT SXTB, SXTH, UXTB, UXTH
BFC, BFI UBFX, SBFX
LDRD, STRD TBB, TBH
Chapter 5 - Memory System
Memory System Features Overview Memory Map
Memory Access Attributes Default Memory Access Permissions
Bit band operation Advantages of bit band operations
Bit Band operation of different data size Bit Band operation in C Programs
Unaligned Transfers Exclusive accesses
Endian
Chapter 6 - Cortex-M3 Processor Implementation Overview
Pipeline
Detailed Block diagram Bus interfaces on the Cortex-M3 processor
I-CODE bus D-CODE bus
System Bus External Private Peripheral Bus (External PPB)
DAP (Debug Access Port) Bus Other interfaces in Cortex-M3
External Private Peripheral Bus Typical connections
Reset signals
Chapter 7 - Exceptions
Exception Types
Definitions of priority Vector Table
Interrupt inputs and pending behaviors Faults exceptions
Bus faults Memory Management Fault
Usage Fault Hard Fault
Dealing with faults SVC and PendSV
Chapter 8 - NVIC and Interrupt Control
NVIC Overview Basic Interrupt Configuration
Interrupt Enable and Clear Enable Interrupt Pending and Clear Pending
Priority Level Active Status
PRIMASK and FAULTMASK special registers BASEPRI special register
Configuration registers for other exceptions Example procedures of setting up an interrupt
Software interrupts SYSTICK timer
Chapter 9 - Interrupt Behavior
Interrupt/exception sequence Exception Exit
Nested Interrupt Tail chaining interrupt
Late arrival More on the Exception Return (EXC_RETURN) value
Interrupt Latency Faults related to Interrupts Chapter 10 – Cortex-M3 Processor Programming
Overview
Using Assembly Using C
Interface between assembly and C Typical development flow
The first step Producing Outputs
Hello World Example Using Data memory
Using Exclusive access for semaphore Using bit band for semaphore
Working with Bit Field Extract and Table Branch
Chapter 11 – Exceptions Programming
Using Interrupts
Stack setup Vector table setup
Interrupt Priority Setup Enable the interrupt
Exception/Interrupt Handler Software Interrupts
Example with Exception handlers Using SVC
Using SVC for output functions Using SVC with C
Chapter 12 – Advance Programming Features & System Behavior
Running system with two separate stacks Double Word Stack alignment
Non-base thread enable Performance Consideration
LOCKUP situations Avoid Lockup
Chapter 13 – Memory Protection Unit (MPU)
Overview
MPU Registers Setting up MPU
Typical setup
Chapter 14 – Other Cortex-M3 Processor Features
SYSTICK timer
Power Management
Multiprocessor communication (SEV and WFE) Self Reset Control
Chapter 15 – Debug Architecture
Debug features overview CoreSight overview
Processor debug interface Debug Host interface
DP module, AP module and DAP Trace interface
CoreSight characteristics Debug modes
Debug events Breakpoint in Cortex-M3
Accessing Registers' content in debug Other core debug features
Chapter 16 – Debug Components
Introduction Trace system in the Cortex-M3 Processor
Trace components - Data Watchpoint and Trace (DWT) Trace components - Instrumentation Trace Macrocell (ITM) Software Trace with ITM
Hardware Trace with ITM and DWT ITM Timestamp
Trace components - Embedded Trace Macrocell (ETM) Trace components - Trace Port Interface Unit (TPIU)
Flash Patch and Breakpoint (FPB) Unit AHB Access Port (AHB-AP)
ROM Table
Chapter 17 – Getting Started with Cortex-M3 Processor Development
Choosing a Cortex-M3 product
Differences between Cortex-M3 revision 0 and revision 1 Development Tools
Chapter 18 – Porting Applications from ARM7 to the Cortex-M3 Processor
Overview System characteristics
Assembly language files C program files Precompiled Object files Optimization
Chapter 19 – Starting Cortex-M3 development using GNU Tool Chain
Background Getting GNU Tool Chain
Development flow Example 1 - The first program
Example 2 – Linking multiple files together Example 3 – A simple hello world program
Example 4 – Data in RAM Example 5 – C only, without assembly file
Example 6 – C only, with standard C startup code Accessing special registers
Using unsupported instructions In-line assembler in GNU C Compiler
Chapter 20 – Getting started with the RealView® Microcontroller Development Kit
Overview of RealView Microcontroller Development Kit Getting start with Vision
Output “Hello world” message via UART Testing the software
Using the debugger Instruction Set Simulator
Modifying the vector table Stopwatch Example with Interrupts
Appendix I Cortex-M3 Instructions Summary
Supported 16-bit Thumb instructions Supported 32-bit Thumb-2 instructions
Appendix II – 16-bit Thumb Instructions and architecture versions
Appendix III – Cortex-M3 Exceptions Quick Reference
Exceptions types and Enable Stack contents after Exception Stacking
Appendix IV - NVIC Registers Quick Reference
Appendix V Cortex-M3 Trouble Shooting Guide
Overview
Developing Fault Handler Understanding cause of the fault
*Other possible problems
Index

Details

No. of pages:
384
Language:
English
Copyright:
© Newnes 2008
Published:
Imprint:
Newnes
eBook ISBN:
9780080551432
Paperback ISBN:
9780750685344

About the Author

Joseph Yiu

Joseph Yiu joined ARM in 2001 and has been involved in a wide range of projects including development of ARM Cortex-M processors and various on-chip system level and debug components. In addition to in-depth knowledge of the processors and microcontroller system design, Joseph also has extensive knowledge in related areas including software development for the ARM Cortex-M microcontrollers, FPGA development and System-on-Chip design technologies.

Affiliations and Expertise

Senior Embedded Technology Specialist, ARM Ltd., Cambridge, UK

Joseph Yiu

Joseph Yiu joined ARM in 2001 and has been involved in a wide range of projects including development of ARM Cortex-M processors and various on-chip system level and debug components. In addition to in-depth knowledge of the processors and microcontroller system design, Joseph also has extensive knowledge in related areas including software development for the ARM Cortex-M microcontrollers, FPGA development and System-on-Chip design technologies.

Affiliations and Expertise

Senior Embedded Technology Specialist, ARM Ltd., Cambridge, UK