Semiconductor Memories and Systems

Semiconductor Memories and Systems

1st Edition - June 7, 2022

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  • Editors: Andrea Redaelli, Fabio Pellizzer
  • Paperback ISBN: 9780128207581
  • eBook ISBN: 9780128209462

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Description

Semiconductor Memories and Systems provides a comprehensive overview of the current state of semiconductor memory at the technology and system levels. After an introduction on market trends and memory applications, the book focuses on mainstream technologies, illustrating their current status, challenges and opportunities, with special attention paid to scalability paths. Technologies discussed include static random access memory (SRAM), dynamic random access memory (DRAM), non-volatile memory (NVM), and NAND flash memory. Embedded memory and requirements and system level needs for storage class memory are also addressed. Each chapter covers physical operating mechanisms, fabrication technologies, and the main challenges to scalability.Finally, the work reviews the emerging trends for storage class memory, mainly focusing on the advantages and opportunities of phase change based memory technologies.

Key Features

  • Features contributions from experts from leading companies in semiconductor memory
  • Discusses physical operating mechanisms, fabrication technologies and paths to scalability for current and emerging semiconductor memories
  • Reviews primary memory technologies, including SRAM, DRAM, NVM and NAND flash memory
  • Includes emerging storage class memory technologies such as phase change memory

Readership

Materials Scientists and Engineers. Electrical Engineers

Table of Contents

  • Cover
  • Title page
  • Table of Contents
  • Copyright
  • Dedication
  • Contributors
  • Foreword
  • Preface
  • Acknowledgments
  • 1: Historical review of semiconductor memories
  • Abstract
  • 1.1: Early 80s: The pioneers
  • 1.2: The 90′: DRAM Technology driver
  • 1.3: The new millennium: NAND technology driver
  • 1.4: The dream of the universal memory
  • 1.5: The 3D-integration era
  • 1.6: The future
  • References
  • 2: The usage of memory in current systems
  • Abstract
  • 2.1: Definition and diversity of systems
  • 2.2: Introduction to the memory hierarchy
  • 2.3: Architecture and goals of memory in systems
  • 2.4: Conclusions
  • References
  • 3: SRAM technology status and perspectives
  • Abstract
  • 3.1: Introduction
  • 3.2: The challenges of SRAM bitcell scaling
  • 3.3: SRAM scaling and performance boosters in nm scaled nodes
  • 3.4: SRAM in the context of new devices
  • 3.5: Hybrid integration of SRAM
  • 3.6: Conclusion
  • References
  • 4: DRAM circuit and process technology
  • Abstract
  • 4.1: High band-bandwidth and low-power DRAM trends
  • 4.2: Circuit technology
  • 4.3: DRAM process technology
  • 4.4: Package and module
  • References
  • 5: NAND Flash technology status and perspectives
  • Abstract
  • 5.1: Introduction
  • 5.2: NAND flash fundamentals
  • 5.3: From 2D NAND to 3D NAND
  • 5.4: Emerging applications for 3D NAND flash
  • 5.5: Conclusions
  • References
  • 6: Embedded memory solutions: Charge storage based, resistive and magnetic
  • Abstract
  • 6.1: Introduction
  • 6.2: Embedded nonvolatile memory evolution (conventional memories)
  • 6.3: Embedded NVM revolution (emerging memories)
  • 6.4: Embedded PCM
  • 6.5: Embedded MRAM
  • 6.6: Future perspectives
  • References
  • 7: The evolving role of storage-class memory in servers and large systems
  • Abstract
  • 7.1: Introduction
  • 7.2: The current state of nonvolatile memory technology
  • 7.3: The Intel Optane memory
  • 7.4: SCM use cases
  • 7.5: Applications exploiting SCMM
  • 7.6: Service interfaces
  • 7.7: Implications for the cloud
  • 7.8: Outlook for the future
  • 7.9: Conclusion
  • References
  • 8: 3DXpoint fundamentals
  • Abstract
  • 8.1: Historical review of standalone PCM architectures
  • 8.2: 3DXpoint technology: The PCM low cost SCM solution
  • 8.3: 3DXpoint future development
  • 8.4: 3DXpoint systems
  • 8.5: Conclusions
  • References
  • 9: Other emerging memories
  • Abstract
  • 9.1: Introduction
  • 9.2: Filamentary resistive RAM
  • 9.3: Ferroelectric HfO2 for ultra-low power memories
  • 9.4: Conclusions
  • References
  • Further reading
  • 10: Computing with nonvolatile memories for artificial intelligence
  • Abstract
  • Acknowledgment
  • 10.1: Introduction
  • 10.2: Memory devices for IMC
  • 10.3: Memory structures
  • 10.4: Computational memory
  • 10.5: IMC circuits nonidealities
  • 10.6: IMC circuit architecture
  • 10.7: Conclusions
  • References
  • Conclusions
  • Index

Product details

  • No. of pages: 362
  • Language: English
  • Copyright: © Woodhead Publishing 2022
  • Published: June 7, 2022
  • Imprint: Woodhead Publishing
  • Paperback ISBN: 9780128207581
  • eBook ISBN: 9780128209462

About the Editors

Andrea Redaelli

Andrea Redaelli received the Laurea and Ph.D. degrees in electronic engineering from Politecnico di Milano, Italy, in 2003 and 2007 respectively. During his Ph.D. he worked on Phase Change Memories in the Department of Electrical and Electronic Engineering (Politecnico di Milano), collaborating with the Non-Volatile Memory Technology Development Group of STMicroelectronics, Agrate Brianza. From 2007, he joined STMicroelectronics working on advanced technologies for Non-Volatile memories. From 2008 to 2013 he worked as cell lead engineer on 45 and 26 nm PCM technology developments, firstly as a Numonyx employee and then joined Micron Technology. In the same years, Andrea cooperated with the Department of Electrical Engineering, Politecnico di Milano, in holding master’s classes on electronics and signal conditioning. His work areas included memory array architecture definition, design of test structures, process integration, cell operation modelling and cell electrical testing. He was also the coordinator of a European funded project under FP7 named PASTRY on low power PCM development. Since 2014 Dr. Redaelli has been working on 3DXpointTM technology, in charge of cell stack optimization and pathfinding activities . Dr. Redaelli is also the editor of a book titled “Phase Change Memory: device physics, reliability and applications”, he is author and co-author of more than 50 papers, and more than 100 patents and filed patent applications.

Affiliations and Expertise

Fellow, Technology Develpoment, STMicroelectronics, Agrate Brianza (MB), Italy

Fabio Pellizzer

Fabio Pellizzer received his M.S. degree in Electronic Engineering in 1996 from the University of Padova, Italy, with a thesis on characterization and reliability of thin gate oxides. In 1998 he joined the Central R&D department of STMicroelectronics in Agrate Brianza (Italy) and worked on the development of several generations of NOR Flash memories, with a focus on gate oxides reliability. Since 2002 he has been in charge of the process development for phase change memories based on chalcogenide materials. Since March 2008 he joined Numonyx as Phase-Change Memory manager in the R&D Technology Development. In May 2011, he joined Micron Technology, where he is responsible for the development of new memory technologies. He is now a Distinguished Member of Technical Staff and Cell Development manager for 3DXPoint technology in Boise (USA). He has authored more than 60 publications on international journals and books and several invited talks at international conferences. He holds more than 130 granted US and European patents on phase-change memories and chalcogenide materials (related to process integration, algorithms and design solutions).

Affiliations and Expertise

Distinguished Member of Technical Staff and Cell Manager, 3DXPoint Technology, USA

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