This second edition is not only a thorough update of the first edition, it is also a marriage of the best-known RISC architecture--MIPS--with the best-known open-source OS--Linux. The first part of the book begins with MIPS design principles and then describes the MIPS instruction set and programmers’ resources. It uses the MIPS32 standard as a baseline (the 1st edition used the R3000) from which to compare all other versions of the architecture and assumes that MIPS64 is the main option. The second part is a significant change from the first edition. It provides concrete examples of operating system low level code, by using Linux as the example operating system. It describes how Linux is built on the foundations the MIPS hardware provides and summarizes the Linux application environment, describing the libraries, kernel device-drivers and CPU-specific code. It then digs deep into application code and library support, protection and memory management, interrupts in the Linux kernel and multiprocessor Linux.
Sweetman has revised his best-selling MIPS bible for MIPS programmers, embedded systems designers, developers and programmers, who need an in-depth understanding of the MIPS architecture and specific guidance for writing software for MIPS-based systems, which are increasingly Linux-based.
Completely new material offers the best explanation available on how Linux runs on real hardware.
Provides a complete, updated and easy-to-use guide to the MIPS instruction set using the MIPS32 standard as the baseline architecture with the MIPS64 as the main option.
Retains the same engaging writing style that made the first edition so readable, reflecting the authors 20+ years experience in designing systems based on the MIPS architecture.
Embedded systems designers and programmers
Chapter 1: RISCs and MIPS 1.1 Pipelines 1.2 The MIPS Five-Stage Pipeline 1.3 RISC and CISC 1.4 Great MIPS Chips of the Past and Present 1.5 MIPS Compared with CISC Architectures
Chapter 2: MIPS Architecture 2.1 A Flavor of MIPS Assembly Language 2.2 Registers 2.3 Integer Multiply Unit and Registers 2.4 Loading and Storing: Addressing Modes 2.5 Data Types in Memory and Registers 2.6 Synthesized Instructions in Assembly Language 2.7 MIPS I to MIPS64 ISAs: 64-Bit (and Other) Extensions 2.8 Basic Address Space 2.9 Pipeline Visibility
Chapter 3: Coprocessor 0: MIPS Processor Control 3.1 CPU Control Instructions 3.2 What Registers Are Relevant When? 3.3 CPU Control Registers and their encoding 3.4 CP0 Hazards—A Trap for the Unwary
Chapter 4: How Caches work on MIPS 4.1 Caches and Cache Management 4.2 How Caches Work 4.3 Write-Through Caches in Early MIPS CPUs 4.4 Write-Back Caches in MIPS CPUs 4.5 Other Choices in Cache Design 4.6 Managing Caches 4.7 L2 and L3 caches 4.8 Cache Configurations for MIPS CPUs 4.9 Programming MIPS32/64 Caches 4.10 Cache Efficiency 4.11 Reorganizing Software to Influence Cache Efficiency 4.12 Cache Aliases
Chapter 5: Exceptions, Interrupts, and Initialization 5.1 Precise Exceptions 5.2 When Exceptions Happen 5.3 Exception Vectors: Where Exception Handling Starts 5.4 Exception Handling: Basics 5.5 Returning from an Exception 5.6 Nesting Exceptions <BR id="C
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- © Morgan Kaufmann 2005
- 17th October 2006
- Morgan Kaufmann
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Dominic Sweetman is a member of the last generation of programmers who could reasonably hope to understand computer systems from bottom to top. His rich career began with low-level coding, progressing from OS development to LANs to distributed systems. Dominic is an experienced designer and developer of hardware systems, CPUs, networks, and operating systems. He was a founder member of Whitechapel Workstations, and in 1988 founded Algorithmics, a MIPS consulting firm of which he is the director. Dominic lives with his partner, two grown-up children and three cats in north London.
This book is a worhtwhile read for anyone interested in Linux on MIPS processors or even MIPS and RISC architecture in general.- James Mohr, Linux Magazine, April 2007