Reconfigurable Computing

Reconfigurable Computing

The Theory and Practice of FPGA-Based Computation

1st Edition - November 2, 2007

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  • Authors: Scott Hauck, André DeHon
  • Hardcover ISBN: 9780123705228
  • eBook ISBN: 9780080556017

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Description

Reconfigurable Computing marks a revolutionary and hot topic that bridges the gap between the separate worlds of hardware and software design— the key feature of reconfigurable computing is its groundbreaking ability to perform computations in hardware to increase performance while retaining the flexibility of a software solution. Reconfigurable computers serve as affordable, fast, and accurate tools for developing designs ranging from single chip architectures to multi-chip and embedded systems. Scott Hauck and Andre DeHon have assembled a group of the key experts in the fields of both hardware and software computing to provide an introduction to the entire range of issues relating to reconfigurable computing. FPGAs (field programmable gate arrays) act as the “computing vehicles” to implement this powerful technology. Readers will be guided into adopting a completely new way of handling existing design concerns and be able to make use of the vast opportunities possible with reconfigurable logic in this rapidly evolving field.

Key Features

  • Designed for both hardware and software programmers
  • Views of reconfigurable programming beyond standard programming languages
  • Broad set of case studies demonstrating how to use FPGAs in novel and efficient ways

Readership

Researchers/Practitioners in Reconfigurable Computing and FPGAs, Graduate-level courses in Advanced Digital Systems (digital design), Reconfigurable Computing, Advanced Computer Architecture, Digital Signal Processing.

Table of Contents

  • Contents
    Preface
    Introduction
    Part One: Hardware
    Part I INTRO
    Chapter 1 - General-Purpose FPGA Architecture
    Chapter 2 - Reconfigurable Computing Devices
    Chapter 3 - Reconfigurable Computing Systems
    Chapter 4 - Reconfiguration Management
    Part Two: Software
    Part II Intro
    Chapter 5 - Computer Models and System Architectures
    André DeHon Chapter 6 - Hardware Description Languages (VHDL)
    Chapter 7 - Compilation for Reconfigurable Computing Machines
    Chapter 8 - Streaming Models
    8.1 MATLAB/SIMULINK
    8.2 SCORE
    Chapter 9 SIMD/Vector
    Chapter 10 - OS/Runtime Systems
    Chapter 11 - JHDL
    Chapter 12 -Technology Mapping
    Chapter 13 - Placement
    13.1 General-purpose / FPGA
    13.2 Datapath
    13.3 Constructive
    Chapter 14 - Routing
    Chapter 15 - Retimin
    Chapter 16 - Bitstream Generation, JBits
    Chapter 17 - Fast Mapping
    Part Three: Application Development
    PART III INTRO
    Chapter 18 - Evaluating and Optimizing problems for FPGA implementations
    Chapter 19- Instance-specific design, Constant Propagation & Partial Evaluation
    Chapter 20 - Precision Analysis & Floating Point
    Chapter 21 - Distributed Arithmetic
    Chapter 22 - CORDIC
    Chapter 23 - Task allocation: FPGA vs. CPU partitioning
    Part Four: Case Studies
    PART IV INTRO
    Chapter 24 - Image Processing, Variable Precision, Algorithm Alteration: SPIHT Compression
    Chapter 25 - Run-time reconfiguration: Automatic Target Recognition
    Chapter 26 - Problem-specific circuitry: SAT Solving
    Chapter 27 - Multi-FPGA Systems: Logic Emulation
    Chapter 28- Floating Point
    Chapter 29 - FDTD
    Chapter 30 - Genetic Evolution
    Chapter 31 - Packet Filtering (Networking application)
    Chapter 32 - Active Pages [Memory centric]
    Part Five: Theoretical Underpinnings and Future Directions
    PART V INTRO
    Chapter 33- Theoretical Underpinnings, Metrics and Analysis
    Chapter 34 - Defect and Fault Tolerance
    Chapter 35 - Reconfigurable Computing and Nanotechnology

Product details

  • No. of pages: 944
  • Language: English
  • Copyright: © Morgan Kaufmann 2007
  • Published: November 2, 2007
  • Imprint: Morgan Kaufmann
  • Hardcover ISBN: 9780123705228
  • eBook ISBN: 9780080556017

About the Authors

Scott Hauck

Affiliations and Expertise

Associate Professor, University of Washington, Department of Electrical Engineering, Seattle, WA, U.S.A.

André DeHon

Affiliations and Expertise

Assistant Professor, Computer Science, California Institute of Technology, Pasadena, CA, USA.

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