Description

Thanks to the continued exponential advances in semiconductor design and the demands of evolving and emerging application domains, the field of computer architecture has never been more dynamic. This, the first major book of computer architecture readings in over two decades, captures this dynamism and reveals Computer Architecture's rich history of practice.

This is much more than a simple collection of papers. The editors have carefully selected the most influential primary sources in specific areas of inquiry that, taken together, present the critical issues of the entire discipline. These include issues in technology, implementation, economics, evaluation methods, instruction set design, instruction level parallelism, dataflow/multithreading, memory systems, input/output systems, single-instruction multiple data parallelism, and multiple-instruction multiple data parallelism. In addition, you'll find the editors' thoughtful, focused introductions to each area, providing the context and background necessary for understanding the significance and lasting impact of these papers.

The primary sources and insightful commentary contained in this book provide foundational knowledge for computer architects as well as for those who design supporting system software and compilers. This is an excellent resource for practitioners, instructors, students, and researchers.

Key Features

* Includes more than 50 influential papers spanning four decades of computer architecture research and development * Selected, edited, and introduced by three eminent researchers and educators in the field. * Demonstrates the value of primary sources by showing how forgotten design ideas of the past are often rediscovered when new needs or constraints emerge. * Accompanied by an annually updated companion Web site with links and references to recently published papers, providing a forum for the editors to comment on how recent work continues or breaks with previous work in the field.

Table of Contents

PREFACE CHAPTER 1 - Classic Machines: Technology, Implementation, and Economics G. M. AMDAHL, G. A. BLAAUW, F. P. BROOKS, JR., "Architecture of the IBM System/360," IBM Journal of Research and Development, , April 1964. J. E. THORNTON " Parallel Operation in the Control Data 6600," Fall Joint Computers Conference, , vol. 26, pp. 33-40, 1961. R. M. RUSSELL, "The Cray-1 Computer System", Comm. ACM, 21, 1 (January 1978), 63-72. J. KOLODZEY, "Cray-1 Computer Technology", IEEE Transactions on Components, Hybrids, and Manufacturing Technology, p181-187, June 1981. G. MOORE, "Cramming More Components onto Integrated Circuits", Electronics, p114-117, April 1965. S. MAZOR, "The History of the Microcomputer - Invention and Evolution", Proc. IEEE Dec '95, 1601-1607. CHAPTER 2 - Methods G. M. AMDAHL, "Validity of the Single-Processor Approach to Achieving Large Scale Computing Capabilities", AFIPS Conference Proceedings, (April 1967), 483-485. M. D. HILL and A. J. SMITH, "Evaluating Associativity in CPU Caches", IEEE Trans. on Computers, C-38, 12 (December 1989), 1612-1630. J. S. EMER and D.

Details

No. of pages:
650
Language:
English
Copyright:
© 1999
Published:
Imprint:
Morgan Kaufmann
Print ISBN:
9781558605398
Electronic ISBN:
9780080573649

About the editors

Mark Hill

Mark D. Hill is Professor and Romnes Fellow in the Computer Sciences and Electrical and Computer Engineering departments at the University of Wisconsin-Madison. His research targets the memory systems of shared-memory multiprocessors and high-performance uniprocessors. Much of his recent work was part of the Wisconsin Wind Tunnel project, which examined supporting multiple parallel programming models on hardware ranging from tightly-coupled multiprocessors to clusters of workstations.

Norman Jouppi

Norman P. Jouppi is Consulting Engineer at Compaq Computer Corporation’s Western Research Laboratory (WRL). Formerly a consulting associate professor in the Department of Electrical Engineering at Stanford University, he has been a key contributor to the architecture and implementation of advanced graphics accelerators (including Neon), the MultiTitan and BIPS microprocessors at WRL, and the MIPS Stanford microprocessor.

Gurindar Sohi

Gurindar S. Sohi, a Professor in the Computer Sciences and Electrical and Computer Engineering departments of the University of Wisconsin-Madison, was awarded the 1999 ACM SIGARCH Maurice Wilkes award for contributions in the areas of high issue rate processors and instruction level parallelism. His research has focused on architectural and microarchitectural techniques for high-performance microprocessors.