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As design complexity in chips and devices continues to rise, so, too, does the demand for functional verification. Principles of Functional Verification is a hands-on, practical text that will help train professionals in the field of engineering on the methodology and approaches to verification.
In practice, the architectural intent of a device is necessarily abstract. The implementation process, however, must define the detailed mechanisms to achieve the architectural goals. Based on a decade of experience, Principles of Functional Verification intends to pinpoint the issues, provide strategies to solve the issues, and present practical applications for narrowing the gap between architectural intent and implementation.
The book is divided into three parts, each building upon the chapters within the previous part. Part One addresses why functional verification is necessary, its definition and goals. In Part Two, the heart of the methodology and approaches to solving verification issues are examined. Each chapter in this part ends with exercises to apply what was discussed in the chapter. Part Three looks at practical applications, discussing project planning, resource requirements, and costs. Each chapter throughout all three parts will open with Key Objectives, focal points the reader can expect to review in the chapter.
- Takes a "holistic" approach to verification issues
- Approach is not restricted to one language
- Discussed the verification process, not just how to use the verification language
Electrical Engineers, Computer & Systems Design Engineers; Electronics Designers & Students
Part One: Why Functional Verification is Necessary; Definition and Goals; Architecture; A Look at What is Being Verified; Part Two: How Functional Verification Works; Determining the Validity of the Model; Verification Methods; Random Testing; Co-Simulation; Measuring Verification Quality; Verification Languages; Part Three: Application of Functional Verification; The Verification Plan; Projecting Costs; Summary: The Project; Verification Languages: Testbuilder, Vera, E; Other Project Verification Tools: Bug-tracking Systems; Other Project Verification Tools: Revision & Release Control Systems
- No. of pages:
- © Newnes 2003
- 22nd October 2003
- Paperback ISBN:
- eBook ISBN:
Andreas Meyer is currently Verification Architect with Cadence Design Systems. Previously, he was a founder and Chief Technical Officer of Zaiq Technologies, Inc. in Woburn, MA. Zaiq is a recognized leader in system-level design and verification for complex, high-performance, system-on-chip based designs. Andy lead the technical development of the company’s intellectual property business and the development of Zaiq’s design and verification methodologies. Prior to founding Zaiq, Andy worked as an independent consultant for a number of leading companies, including Teradyne Corporation, Sun Microsystems and Sequoia Systems. Andy holds a BSEE from the University of Illinois at Champaign and an MSECE from the University of Massachusetts at Amherst.
Verification Architect, Cadence Design Systems