On-Chip Communication Architectures

Over the past decade, system-on-chip (SoC) designs have evolved to address the ever increasing complexity of applications, fueled by the era of digital convergence. Improvements in process technology have effectively shrunk board-level components so they can be integrated on a single chip. New on-chip communication architectures have been designed to support all inter-component communication in a SoC design. These communication architecture fabrics have a critical impact on the power consumption, performance, cost and design cycle time of modern SoC designs. As application complexity strains the communication backbone of SoC designs, academic and industrial R&D efforts and dollars are increasingly focused on communication architecture design. On-Chip Communication Architecures is a comprehensive reference on concepts, research and trends in on-chip communication architecture design. It will provide readers with a comprehensive survey, not available elsewhere, of all current standards for on-chip communication architectures.

Practitioners/Researchers in VLSI Design, System on Chip Design, and Networks on Chips at integrated circuit design companies such as Xilinx, IBM, Texas Instruments, Freescale Semiconductor, Infineon, etc; Software developers in electronic design automation companies such as Synopsis, Cadence, Mentor Graphics, Magma, etc. Graduate students in VLSI design, training to go to work for the above.