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1. CMOS and Beyond CMOS: Scaling Challenges
2. Opportunities for high mobility materials integrated on a Si platform
3. Monolithic integration of InGaAs on Si(001) substrate for Logic devices
4. III-N epitaxy on Si for power electronics
5. Impact of defects on the performance of high-mobility semiconductor devices
6. (Si)Ge devices
7. III-V Devices and Technology for CMOS
8. Beyond CMOS
9. Optoelectronic devices integrated on silicon
10. High mobility devices for digital applications
High Mobility Materials for CMOS Applications provides a comprehensive overview of recent developments in the field of (Si)Ge and III-V materials and their integration on Si. The book covers material growth and integration on Si, going all the way from device to circuit design. While the book's focus is on digital applications, a number of chapters also address the use of III-V for RF and analog applications, and in optoelectronics. With CMOS technology moving to the 10nm node and beyond, however, severe concerns with power dissipation and performance are arising, hence the need for this timely work on the advantages and challenges of the technology.
- Addresses each of the challenges of utilizing high mobility materials for CMOS applications, presenting possible solutions and the latest innovations
- Covers the latest advances in research on heterogeneous integration, gate stack, device design and scalability
- Provides a broad overview of the topic, from materials integration to circuits
Materials science researchers and electronic engineers in research and design
- No. of pages:
- © Woodhead Publishing 2018
- 20th June 2018
- Woodhead Publishing
- Paperback ISBN:
- eBook ISBN:
Nadine Collaert has been involved in the theory, design, and technology of FinFET-based multi-gate devices, emerging memory devices, transducers for biomedical applications and the integration and characterization of biocompatible materials e.g. carbon-based materials.
From 2012 until April 2016 she was program manager of the imec LOGIC program, focusing on high mobility channels, TFET and nanowires.
Since April 2016 she is a distinguished member of technical staff responsible for the research on novel CMOS scaling approaches based on heterogeneous integration of new materials with Si and new material-enabled device and system approaches to increase functionality.
She has authored or coauthored more than 300 papers in international journals and conference proceedings. She has been a member of the CDT committee of the IEDM conference and she is still a member of the Program Committees of the international conferences ESSDERC and ULIS/EUROSOI. Nadine Collaert has been involved in the theory, design, and technology of FinFET-based multi-gate devices, emerging memory devices, transducers for biomedical applications and the integration and characterization of biocompatible materials e.g. carbon-based materials.
Interuniversity Micro-Electronics Center, Leuven
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