Handbook of Thin Film Deposition

3rd Edition

Authors: Krishna Seshan
Hardcover ISBN: 9781437778731
eBook ISBN: 9781437778748
Imprint: William Andrew
Published Date: 27th June 2012
Page Count: 408
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The Handbook of Thin Film Deposition is a comprehensive reference focusing on thin film technologies and applications used in the semiconductor industry and the closely related areas of thin film deposition, thin film micro properties, photovoltaic solar energy applications, new materials for memory applications and methods for thin film optical processes.  In a major restructuring, this edition of the handbook lays the foundations with an up-to-date treatment of lithography, contamination and yield management, and reliability of thin films. The established physical and chemical deposition processes and technologies are then covered, the last section of the book being devoted to more recent technological developments such as microelectromechanical systems, photovoltaic applications, digital cameras, CCD arrays, and optical thin films.

Key Features

  • A practical survey of thin film technologies aimed at engineers and managers involved in all stages of the process: design, fabrication, quality assurance and applications
  • Covers core processes and applications in the semiconductor industry and new developments in the photovoltaic and optical thin film industries
  • The new edition takes covers the transition taking place in the semiconductor world from Al/SiO2 to copper interconnects with low-k dielectrics
  • Written by acknowledged industry experts from key companies in the semiconductor industry including Intel and IBM
  • Foreword by Gordon E. Moore, co-founder of Intel and formulator of the renowned ‘Moore’s Law’ relating to the technology development cycle in the semiconductor industry


New third edition of the popular book on deposition. Aimed at engineers, technicians, and plant personnel in the semiconductor and related industries

Table of Contents





About the Editor

List of Contributors


Introduction to Chapter 1

1. A Perspective on Today’s Scaling Challenges and Possible Future Directions

1.1 Introduction

1.2 Review and Update of Generalized Scaling

1.3 Energy/Performance Considerations

1.4 Design Issues with Back-Gated Thin SOI CMOS

1.5 Carrier Confinement and Quantization Effects

1.6 Potential of Low-Temperature Operation

1.7 Conclusion



2. Scaling and Its Implications for the Integration and Design of Thin Film and Processes

2.1 Scaling: Basics, Causes, and Consequences

2.2 FEOL Scaling: State of the Art Transistors Described in Refs [51,52]

2.3 Silicon on Insulator and System on a Chip

2.4 Back End of the Line Scaling

2.5 International Technology Roadmap for Semiconductors, See Ref. [65]

2.6 Miscellaneous Effects

2.7 Scaling and Reliability [38,40,63]

2.8 Economics of Scaling

2.9 Summary and Conclusions



Appendix 1 Basis for Scaling: Shannon’s Theorem

Appendix 2 Rent’s Rule and Consequences for Scaling

Appendix 3 Comparison of Changes and New Materials Going from Micro- to Nanotransistors

Appendix 4 Summary of Back-End Changes in Materials and Processing

Appendix 5 List of Abbreviations

3. Scaling—Its Effects on Heat Generation and Cooling of Devices. A “Thermal Moore’s” Law?

3.1 Purpose of This Section

3.2 Heat Generation Trends from Chips

3.3 The Chip-Cooling Problem and Its Importance

3.4 Definition of TDP, Thermal Resistance, TDD Versus SPECINT; and Their Use [4]

3.5 Where Is the Need for Cooling?

3.6 The Cooling Package Design


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© William Andrew 2012
William Andrew
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About the Author

Krishna Seshan

Affiliations and Expertise

was formerly Assistant Professor in Materials Science at the University of Arizona and has extensive professional experience as a technologist with both the IBM and Intel Corporations.