FinFET Modeling for IC Simulation and Design

1st Edition

Using the BSIM-CMG Standard

Authors:

Description

This book is the first to explain FinFET modeling for IC simulation and the industry standard – BSIM-CMG - describing the rush in demand for advancing the technology from planar to 3D architecture, as now enabled by the approved industry standard.

The book gives a strong foundation on the physics and operation of FinFET, details aspects of the BSIM-CMG model such as surface potential, charge and current calculations, and includes a dedicated chapter on parameter extraction procedures, providing a step-by-step approach for the efficient extraction of model parameters.

With this book you will learn:

  • Why you should use FinFET
  • The physics and operation of FinFET
  • Details of the FinFET standard model (BSIM-CMG)
  • Parameter extraction in BSIM-CMG
  • FinFET circuit design and simulation

Key Features

  • Authored by the lead inventor and developer of FinFET, and developers of the BSIM-CM standard model, providing an experts’ insight into the specifications of the standard
  • The first book on the industry-standard FinFET model - BSIM-CMG

Readership

Device modelers, circuit designers

Table of Contents

1. FinFET- from Device Concept to Standard Compact Model
2. Analog/RF behavior of FinFET
3. Core Model for FinFETs
4. Channel Current and Real Device Effects
5. Leakage Current Models
6. Charge, Capacitance and Nonquasi-Static Effect
7. Parasitic Resistances and Capacitances
8. Noise
9. Junction Diode Current and Capacitance
10. Benchmark tests for Compact Models
11. BSIM-CMG Model Parameter Extraction
12. Temperature Effects

 

Details

No. of pages:
304
Language:
English
Copyright:
© 2015
Published:
Imprint:
Academic Press
Electronic ISBN:
9780124200852
Print ISBN:
9780124200319

About the authors

Yogesh Chauhan

Yogesh S. Chauhan is an assistant professor in EE department at Indian Institute of Technology Kanpur, India. He received Ph.D. degree in compact modeling of high voltage MOSFETs in 2007 from EPFL Switzerland. During 2007-2010, he was manager in IBM Bangalore where he led compact modeling team focusing on RF bulk and SOI transistors and ESD modeling team. During 2010-2012, he was postdoctoral fellow at University of California Berkeley, where he worked on development of bulk and multigate transistor models including BSIM6, BSIM-IMG and BSIM-CMG. He received IBM faculty award in 2013 for his contribution in compact modeling. He has co-authored over 50 conference and journal publications in the field of device compact modeling.

Darsen Duane Lu

Darsen Lu was one of the key contributors of the industry standard FinFET compact model, BSIM-CMG, and thin-body SOI compact model, BSIM-IMG. He received the B.S. degree in electrical engineering in 2005, from National Tsing Hua University, Hsinchu, Taiwan, and the M.S. and Ph.D. degrees in electrical engineering from the University of California, Berkeley, in 2007 and 2011. Since 2011, he has been a Research Scientist with the IBM Thomas J. Watson Research Center, Yorktown Heights, NY. His current research focuses on the modeling of novel semiconductor devices such as SiGe FinFETs, phase change memory and carbon-based transistors.

Vanugopalan Sriramkumar

Sriramkumar Venugopalan received his MS and Ph.D. degree in Electrical Engineering at University of California, Berkeley and his Bachelors degree from Indian Institute of Technology (IIT) Kanpur. While at Berkeley he worked in the BSIM Group and pursued research and development of multi-gate transistor compact SPICE models that contributed to the industry standard BSIM-CMG model. He has authored and co-authored more than 30 research papers in the area of semiconductor device SPICE models and integrated circuit design. Currently Dr. Venugopalan is with Samsung Electronics pursuing RF integrated circuit design in advanced semiconductor technology nodes.

Sourabh Khandelwal

Sourabh Khandelwal is currently a Postdoctoral Researcher in the BSIM Group, University of California, Berkeley. Sourabh received his PhD degree from Norwegian University of Science and Technology in 2013 and Masters’ degree from Indian Institute of Technology (IIT) Bombay in 2007. From 2007 – 2010 he worked as a Research Engineer at IBM Semiconductor Research and Development Centre, developing compact models for RF SOI devices. He holds a patent and has authored several research papers in the area of device modeling and characterization. His PhD work on GaN compact model is under consideration for industry standardization by the Compact Model Coalition.

Juan Duarte

Juan Pablo Duarte Sepúlveda is currently working toward his PhD. degree at the University of California, Berkeley. He received his BS (2010) and MS (2012) degrees in Electrical Engineering from Korea Advanced Institute of Science and Technology (KAIST). He held a position as a lecturer at Universidad Tecnica Federico Santa Maria, Valparaiso, Chile, in 2012. He has authored many papers in nanoscale semiconductor device modeling and characterization. He received the Best Student Paper Award at the 2013 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) for the paper “Unified FinFET Compact Model: Modelling Trapezoidal Triple-Gate FinFETs”.

Navid Payvadosi

Navid Paydavosi received his Ph.D. degree in Micro-Electro-Mechanical Systems (MEMS) and Nanosystems from the University of Alberta, Canada in 2011. He worked for the BSIM Group at University of California, Berkeley as a post-doctoral scholar from 2012 to 2014. He has published several research papers on the theory and modeling of modern Si-MOSFETs and its future alternatives, including carbon-based and III-V high electron mobility devices. Currently Dr. Paydavosi is with Intel Corp., Oregon as a device engineer working on process technology development.

Ai Niknejad

Ali M. Niknejad received the B.S.E.E. degree from the University of California, Los Angeles, in 1994, and his Master’s and Ph.D. degrees in electrical engineering from the University of California, Berkeley, in 1997 and 2000. He is currently a professor in the EECS department at UC Berkeley and Faculty Director of the Berkeley Wireless Research Center (BWRC) Group. Prof. Niknejad is the recipient of the 2012 ASEE Frederick Emmons Terman Award for his work and textbook on electromagnetics and RF integrated circuits. He has co-authored over 200 conference and journal publications in the field of integrated circuits and device compact modeling. His focus areas of his research include analog, RF, mixed-signal, mm-wave circuits, device physics and compact modeling, and numerical techniques in electromagnetics.

Chenming Hu

Chenming Hu is Distinguished Chair Professor Emeritus at UC Berkeley. He was the Chief Technology Officer of TSMC and founder of Celestry Design Technologies. He is best known for developing the revolutionary 3D transistor FinFET that powers semiconductor chips beyond 20nm. He also led the development of BSIM-- the industry standard transistor model that is used in designing most of the integrated circuits in the world. He is a member of the US Academy of Engineering, the Chinese Academy of Science, and Academia Sinica. His honors include the Asian American Engineer of the Year Award, IEEE Andrew Grove Award and Solid Circuits Award as well as Nishizawa Medal, and UC Berkeley's highest honor for teaching-- the Berkeley Distinguished Teaching Award.