Visit the authors' companion site! - Includes interactive forum with the authors! Electronic System Level (ESL) design has mainstreamed – it is now an established approach at most of the world’s leading system-on-chip (SoC) design companies and is being used increasingly in system design. From its genesis as an algorithm modeling methodology with ‘no links to implementation’, ESL is evolving into a set of complementary methodologies that enable embedded system design, verification and debug through to the hardware and software implementation of custom SoC, system-on-FPGA, system-on-board, and entire multi-board systems. This book arises from experience the authors have gained from years of work as industry practitioners in the Electronic System Level design area; they have seen "SLD" or "ESL" go through many stages and false starts, and have observed that the shift in design methodologies to ESL is finally occurring. This is partly because of ESL technologies themselves are stabilizing on a useful set of languages being standardized (SystemC is the most notable), and use models are being identified that are beginning to get real adoption. ESL DESIGN & VERIFICATION offers a true prescriptive guide to ESL that reviews its past and outlines the best practices of today. Table of Contents CHAPTER 1: WHAT IS ESL? CHAPTER 2: TAXONOMY AND DEFINITIONS FOR THE ELECTRONIC SYSTEM LEVEL CHAPTER 3: EVOLUTION OF ESL DEVELOPMENT CHAPTER 4: WHAT ARE THE ENABLERS OF ESL? CHAPTER 5: ESL FLOW CHAPTER 6: SPECIFICATIONS AND MODELING CHAPTER 7: PRE-PARTITIONING ANALYSIS CHAPTER 8: PARTITIONING CHAPTER 9: POST-PARTITIONING ANALYSIS AND DEBUG CHAPTER 10: POST-PARTITIONING VE

Key Features

* Provides broad, comprehensive coverage not available in any other such book * Massive global appeal with an internationally recognised author team * Crammed full of state of the art content from notable industry experts


PRIMARY: Industry practitioners; SOC engineers designing embedded systems… System architect, (MP)SoC system designer, Engineering managers in the (MP)SoC system design field.

Table of Contents

CHAPTER 1 WHAT IS ESL? So, What is ESL? Who Should Read this Book Chapter Listing The Prescription References CHAPTER 2 TAXONOMY AND DEFINITIONS FOR THE ELECTRONIC SYSTEM LEVEL Taxonomy Introduction Model Taxonomy Temporal Axis Data Axis Functionality Axis Structural Axis ESL Taxonomy Concurrency Communication Concurrency and Communications Configurability Examples Languages Processors Flows Definitions Acronyms CHAPTER 3 EVOLUTION OF ESL DEVELOPMENT Introduction Motivation for ESL Design Traditional System Design Effectiveness System Design with ESL Methodology Behavioural Modelling Methodology VSP: Potential Value VSP: Programmer’s View VSP: Programmer’s View Plus Timing VSP: Cycle Accurate View Behavioural Modelling Environments Commercial Tools The Trailblazer: VCC Latest Generation Tools POLIS Ptolemy Simulator SpecC Language OSCI SystemC Reference Simulator Historical Barriers to Adoption of Behavioural Modelling The Demand Side The Standards Barrier Open SystemC Initiative Open Core Protocol International Partnership SpecC Technology Open Consortium The System Level Language War Automated Links to Chip Implementation Automated Implementation of Fixed-Function Hardware Commercial Tools Mathematical Algorithm Development Tools Graphical Algorithm Development Tools


No. of pages:
© 2007
Morgan Kaufmann
eBook ISBN:
Print ISBN:

About the authors

Grant Martin

Affiliations and Expertise

Tensilica, Inc., Pleasanton, CA

Brian Bailey

Affiliations and Expertise

Poseidon Design Systems, Oregon City, OR

Andrew Piziali

Affiliations and Expertise

Cadence Design Systems, Parker, TX