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Digital Electronics and Design with VHDL - 1st Edition - ISBN: 9780123742704, 9780080557557

Digital Electronics and Design with VHDL

1st Edition

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Author: Volnei A. Pedroni
Hardcover ISBN: 9780123742704
eBook ISBN: 9780080557557
Imprint: Morgan Kaufmann
Published Date: 25th January 2008
Page Count: 720
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Description

Digital Electronics and Design with VHDL offers a friendly presentation of the fundamental principles and practices of modern digital design. Unlike any other book in this field, transistor-level implementations are also included, which allow the readers to gain a solid understanding of a circuit's real potential and limitations, and to develop a realistic perspective on the practical design of actual integrated circuits.

Coverage includes the largest selection available of digital circuits in all categories (combinational, sequential, logical, or arithmetic); and detailed digital design techniques, with a thorough discussion on state-machine modeling for the analysis and design of complex sequential systems. Key technologies used in modern circuits are also described, including Bipolar, MOS, ROM/RAM, and CPLD/FPGA chips, as well as codes and techniques used in data storage and transmission. Designs are illustrated by means of complete, realistic applications using VHDL, where the complete code, comments, and simulation results are included.

This text is ideal for courses in Digital Design, Digital Logic, Digital Electronics, VLSI, and VHDL; and industry practitioners in digital electronics.

Key Features

  • Comprehensive coverage of fundamental digital concepts and principles, as well as complete, realistic, industry-standard designs
  • Many circuits shown with internal details at the transistor-level, as in real integrated circuits
  • Actual technologies used in state-of-the-art digital circuits presented in conjunction with fundamental concepts and principles
  • Six chapters dedicated to VHDL-based techniques, with all VHDL-based designs synthesized onto CPLD/FPGA chips

Readership

Textbook for courses in Digital Design, Digital Logic, Digital Electronics, VLSI, and VHDL; Industry practitioners in digital electronics.

Table of Contents

Preface

  1. Introduction

  2. 1 Historical notes

  3. 2 Analog versus digital

  4. 3 Bits, bytes, and words

  5. 4 Digital Circuits

  6. 5 Combinational circuits versus sequential circuits

  7. 6 Integrated circuits (ICs)

  8. 7 Printed circuit board (PCB)

  9. 8 Logic values versus physical values

  10. 9 Non-programmable, programmable, and hardware-programmable

  11. 10 Binary waveforms

  12. 11 DC, AC, and transient responses

  13. 12 Programmable logic devices (PLDs)

  14. 13 Circuit synthesis and simulation with VHDL

  15. 14 Circuit simulation with Spice

  16. 15 Gate-level versus transistor-level analysis

  17. Binary representations

  18. 1 Binary code

  19. 2 Octal and hexadecimal codes

  20. 3 Gray code

  21. 4 BCD code

  22. 5 Codes for negative numbers

  23. 6 Floating-point representation

  24. 7 ASCII code

  25. 8 Unicode

  26. 9 Exercises

  27. Binary arithmetic

  28. 1 Unsigned addition

  29. 2 Signed addition and subtraction

  30. 3 Shift operations

  31. 4 Unsigned multiplication

  32. 5 Signed multiplication

  33. 6 Unsigned division

  34. 7 Signed division

  35. 8 Floating-point addition and subtraction

  36. 9 Floating-point multiplication

  37. 10 Floating-point division

  38. 11 Exercises

  39. Introduction to digital circuits

  40. 1 Introduction to MOS transistors

  41. 2 Inverter and CMOS logic

  42. 3 AND and NAND gates

  43. 4 OR and NOR gates

  44. 5 XOR and XNOR gates

  45. 6 Modulo-2 adder

  46. 7 Buffer

  47. 8 Tri-state buffer

  48. 9 Open-drain buffer

  49. 10 D-type flip-flop

  50. 11 Shift register

  51. 12 Counters

  52. 13 Pseudo-random sequence generator

  53. 14 Exercises

  54. Boolean algebra

  55. 1 Truth tables

  56. 2 Minterms and SOP equations

  57. 3 Maxterms and POS equations

  58. 4 Standard circuits for SOP and POS equations

  59. 5 Karnaugh maps

  60. 6 Large Karnaugh maps

  61. 7 Other function-simplification techniques

  62. 8 Propagation delay and glitches

  63. 9 Exercises

  64. Line codes

  65. 1 The use of line codes

  66. 2 Parameters and types of line codes

  67. 3 Unipolar codes

  68. 4 Polar codes

  69. 5 Bipolar codes

  70. 6 Biphase/Manchester codes

  71. 7 MLT codes

  72. 8 mB/nB codes

  73. 9 PAM codes

  74. 10 Exercises

  75. Error-detecting/correcting codes

  76. 1 Introduction

  77. 2 Single-parity-check (SPC) codes

  78. 3 Cyclic redundancy check (CRC) codes

  79. 4 Hamming codes

  80. 5 Reed Solomon codes

  81. 6 Convolutional codes and Viterbi decoder

  82. 7 Turbo codes

  83. 8 Low-density parity-check (LDPC) codes

  84. 9 Exercises

  85. Bipolar junction transistor (BJT)

  86. 1 Semiconductors

  87. 2 The bipolar junction transistor (BJT)

  88. 3 I-V characteristics

  89. 4 DC response

  90. 5 Transient response

  91. 6 AC response

  92. 7 Modern BJTs

  93. 8 Exercises

  94. NIS transistor

  95. 1 Semiconductors

  96. 2 The field-effect transistor (MOSFET)

  97. 3 I-V characteristics

  98. 4 DC response

  99. 5 CMOS inverter

  100. 6 Transient response

  101. 7 AC response

  102. 8 Modern MOSFETs

  103. 9 Exercises

  104. Logic families and I/Os Logic architectures and I/Os

  105. 1 BJT-based logic families

  106. 2 Diode-transistor logic (DTL)

  107. 3 Transistor-transistor logic (TTL)

  108. 4 Emitter-coupled logic (ECL)

  109. 5 MOS-based logic families

  110. 6 CMOS logic

  111. 7 Other static MOS architectures

  112. 8 Dynamic MOS architectures

  113. 9 Modern I/O standards

  114. 10 Exercises

  115. Combinational logic circuits

  116. 1 Combinational versus sequential logic

  117. 2 Logical versus arithmetic circuits

  118. 3 Fundamental logic gates

  119. 4 Compound gates

  120. 5 Encoders and decoders

  121. 6 Multiplexer

  122. 7 Parity detector

  123. 8 Priority encoder

  124. 9 Binary sorter

  125. 10 Barrel shifters

  126. 11 Non-overlapping clock generators

  127. 12 Short-pulse generators

  128. 13 Schmitt triggers

  129. 14 Memories

  130. 15 Exercises

  131. 16 Exercises with VHDL

  132. 17 Exercises with SPICE

  133. Combinational arithmetic circuits

  134. 1 Arithmetic versus logical functions

  135. 2 Basic adders

  136. 3 Fast adders

  137. 4 Bit-serial adder

  138. 5 Signed adders/subtracters

  139. 6 Incrementer, decrementer, and two’s complementer

  140. 7 Comparators

  141. 8 ALU (arithmetic-logic unit)

  142. 9 Multipliers

  143. 10 Dividers

  144. 11 Exercises

  145. 12 Exercises with VHDL

  146. 13 Exercises with SPICE

  147. Registers

  148. 1 Sequential versus combinational logic

  149. 2 SR latch (SRL)

  150. 3 D latch (DL)

  151. 4 D flip-flop (DFF)

  152. 5 Master-slave DFFs

  153. 6 Pulse-based DFFs

  154. 7 Dual-edge DFFs

  155. 8 Statistically low-power DFFs

  156. 9 DFF control ports

  157. 10 T flip-flop (TFF)

  158. 11 Exercises

  159. 12 Exercises with SPICE

  160. Sequential circuits

  161. 1 Shift registers

  162. 2 Synchronous counters

  163. 3 Asynchronous counters

  164. 4 Signal generators

  165. 5 Frequency dividers

  166. 6 PLL and prescalers

  167. 7 Pseudo-random sequence generators

  168. 8 Scramblers and descramblers

  169. 9 Exercises

  170. 10 Exercises with VHDL

  171. 11 Exercises with SPICE

  172. Finite state machines

  173. 1 FSM model

  174. 2 Design of finite state machines

  175. 3 System resolution and glitches

  176. 4 Design of large FSMs

  177. 5 Design of FSMs with complex combinational logic

  178. 6 Design of symmetric-phase frequency dividers

  179. 7 FSM encoding styles

  180. 8 Exercises

  181. 9 Exercises with VHDL

  182. Volatile memories

  183. 1 Memory types

  184. 2 SRAM (Static Random Access Memory)

  185. 3 Dual and Quad Data Rate SRAMS (DDR and QDR)

  186. 4 DRAM (Dynamic Random Access Memory)

  187. 5 SDRAM (Synchronous DRAM)

  188. 6 Dual Data Rate SDRAMs, (DDR, DDR2, and DDR3)

  189. 7 CAM (Content-Addressable Memory) for Cache Memories

  190. 8 Exercises

  191. Non-volatile memories

  192. 1 Memory types

  193. 2 MP-OM (Mask-Programmed ROM)

  194. 3 OTP ROM (One-Time Programmable ROM or PROM)

  195. 4 EPROM (Electrically Programmable ROM)

  196. 5 EEPROM (Electrically Erasable-Programmable ROM)

  197. 6 Flash memory

  198. 7 Next generation memories: FRAM, MRAM, PRAM

  199. 8 Exercises

  200. Programmable logic devices (PLDs)

  201. 1 The concept of programmable logic devices

  202. 2 SPLDs

  203. 3 CPLDs

  204. 4 FPGAs

  205. 5 Exercises

  206. VHDL Summary

  207. 1 About VHDL

  208. 2 Code structure

  209. 3 Fundamental libraries and packages

  210. 4 Pre-defined data types

  211. 5 User-defined data types and arrays

  212. 6 Operators

  213. 7 Attributes

  214. 8 Concurrent code (WHEN, GENERATE)

  215. 9 Sequential code (IF, CASE, LOOP, WAIT)

  216. 10 Objects (SIGNAL, VARIALBE, CONSTANT)

  217. 11 Packages

  218. 12 Components

  219. 13 Functions

  220. 14 Procedures

  221. 15 VHDL template for FSMs

  222. 16 Exercises

  223. VHDL design of combinational logic circuits

  224. 1 Generic address decoder

  225. 2 BCD-to-SSD conversion function

  226. 3 Generic multiplexer

  227. 4 Generic priority encoder

  228. 5 Design of ROM memory

  229. 6 Design of Synchronous RAM Memories

  230. 7 Exercises

  231. VHDL design of combinational arithmetic circuits

  232. 1 Carry-rippler adder

  233. 2 Carry-lookahead adder

  234. 3 Signed and unsigned adders/subtracters

  235. 4 Signed and unsigned multipliers/dividers

  236. 5 ALU

  237. 6 Exercises

  238. VHDL design of regular sequential circuits

  239. 1 Shift register with load

  240. 2 Switch debouncer

  241. 3 Timer

  242. 4 Fibonacci series generator

  243. 5 Frequency meters

  244. 6 Neural networks

  245. 7 Exercises

  246. VHDL design of state machines

  247. 1 String detector

  248. 2 “Universal” signal generator

  249. 3 Car alarm

  250. 4 LCD driver

  251. 5 Exercises

  252. Simulation with VHDL testbenches

  253. 1 synthesis versus simulation

  254. 2 Stimulus generation

  255. 3 Writing testbenches—part 1

  256. 4 Writing testbenches—part 2

  257. 5 Functional simulations

  258. 6 Timing Simulations

  259. 7 Exercises

  260. Simulation with SPICE

  261. 1 About SPICE

  262. 2 Types of Analysis

  263. 3 Basic structure of SPICE code

  264. 4 Declarations of electronic devices

  265. 5 Declarations of independent DC sources

  266. 6 Declarations of independent AC sources

  267. 7 Declarations of dependent sources

  268. 8 SPICE inputs and outputs

  269. 9 DC respons examples

  270. 10 Transient response examples

  271. 11 AC response sample

  272. 12 Subcircuits

  273. 13 Exercises involving combinational logic circuits

  274. 14 Exercises involving combinational arithmetic circuits

  275. 15 Exercises involving registers

  276. 16 Exercises involving sequential circuits

Appendices A ModelSim Tutorial B PSpice Tutorial

References

Index

Details

No. of pages:
720
Language:
English
Copyright:
© Morgan Kaufmann 2008
Published:
25th January 2008
Imprint:
Morgan Kaufmann
Hardcover ISBN:
9780123742704
eBook ISBN:
9780080557557

About the Author

Volnei A. Pedroni

Affiliations and Expertise

Federal University of Technology—Parana, Curitiba, Brazil

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