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Hardware/software co-verification is how to make sure that embedded system software works correctly with the hardware, and that the hardware has been properly designed to run the software successfully -before large sums are spent on prototypes or manufacturing.
This is the first book to apply this verification technique to the rapidly growing field of embedded systems-on-a-chip(SoC). As traditional embedded system design evolves into single-chip design, embedded engineers must be armed with the necessary information to make educated decisions about which tools and methodology to deploy. SoC verification requires a mix of expertise from the disciplines of microprocessor and computer architecture, logic design and simulation, and C and Assembly language embedded software. Until now, the relevant information on how it all fits together has not been available. Andrews, a recognized expert, provides in-depth information about how co-verification really works, how to be successful using it, and pitfalls to avoid. He illustrates these concepts using concrete examples with the ARM core - a technology that has the dominant market share in embedded system product design. The companion CD-ROM contains all source code used in the design examples, a searchable e-book version, and useful design tools.
The only book on verification for systems-on-a-chip (SoC) on the market
Will save engineers and their companies time and money by showing them how to speed up the testing process, while still avoiding costly mistakes
Design examples use the ARM core, the dominant technology in SoC, and all the source code is included on the accompanying CD-Rom, so engineers can easily use it in their own designs
Embedded systems engineers and programmers, verification engineers, engineering production managers. Electrical/software engineering students, electronics technicians working in embedded systems, inhouse training departments of electronics manufacturers.
Foreward Preface Acknowledgments About the Author About Verisity What’s on the CD-ROM?
Chapter 1: Embedded System Verification: An Introduction Chapter 2: Hardware and Software Design Process Chapter 3: SoC Verification Topics for the ARM Architecture Chapter 4: Hardware/Software Co-Verification Chapter 5: Advanced Hardware/Software Co-Verification Chapter 6: Hardware Verification Environment and Co-Verification Chapter 7: Methodology for an Example ARM Soc
- No. of pages:
- © Newnes 2005
- 16th August 2004
- Paperback ISBN:
- eBook ISBN:
Jason Andrews is currently working in the areas of hardware/software co-verification and testbench methodology for SoC design at Verisity. He has implemented multiple commercial co-verification tools as well as many custom co-verification solutions. His experience in the EDA and embedded marketplace includes software development and product management at Verisity, Axis Systems, Simpod, Summit Design, and Simulation Technologies. He has presented technical papers and tutorials at the Embedded Systems Conference, Communication Design Conference and IP/SoC and written numerous articles related to HW/SW co-verification and design verification. He has a B.S. in electrical engineering from The Citadel, Charleston, S.C., and an M.S. in electrical engineering from the University of Minnesota. He currently lives in the Minneapolis area with his wife, Deborah, and their four children.
Embedded Engineer, Verisity, CA, USA
"Jason Andrews is one of the acknowledged world's experts in hardware/software verification. His unique knowledge, spanning both hardware design and software development, has enabled him to come up with breakthrough design tools and methodologies solving many of today's most pressing verification challenges. This is one of the most important books to come on the scene in the last ten years." Gary Smith, Chief Analyst, Design & Engineering, Gartner Dataquest
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