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Description
This book provides a comprehensive description of the architetural techniques to tackle the soft error problem. It covers the new methodologies for quantitative analysis of soft errors as well as novel, cost-effective architectural techniques to mitigate them. To provide readers with a better grasp of the broader problem deffinition and solution space, this book also delves into the physics of soft errors and reviews current circuit and software mitigation techniques.
TABLE OF CONTENTS
Chapter 1: Introduction
Chapter 2: Device- and Circuit-Level Modeling, Measurement, and Mitigation
Chapter 3: Architectural Vulnerability Analysis
Chapter 4: Advanced Architectural Vulnerability Analysis
Chapter 5: Error Coding Techniques
Chapter 6: Fault Detection via Redundant Execution
Chapter 7: Hardware Error Recovery
Chapter 8: Software Detection and Recovery
Key Features
* Helps readers build-in fault tolerance to the billions of microchips produced each year, all of which are subject to soft errors
* Shows readers how to quantify their soft error reliability
* Provides state-of-the-art techniques to protect against soft errors
Readership
Practitioners in semi-conductor industry, researchers & developers in computer architecture, advanced graduate seminar courses on soft errors, and (iv) as a reference book for undergraduate courses in
computer architecture. I will describe many basic and advanced
techniques to make this book of interest to this broad audience.
Table of Contents
Chapter 1: Introduction
Chapter 2: Device- and Circuit-Level Modeling, Measurement, and Mitigation
Chapter 3: Architectural Vulnerability Analysis
Chapter 4: Advanced Architectural Vulnerability Analysis
Chapter 5: Error Coding Techniques
Chapter 6: Fault Detection via Redundant Execution
Chapter 7: Hardware Error Recovery
Chapter 8: Software Detection and Recovery
Details
- No. of pages:
- 360
- Language:
- English
- Copyright:
- © 2008
- Published:
- 22nd February 2008
- Imprint:
- Morgan Kaufmann
- eBook ISBN:
- 9780080558325
- Print ISBN:
- 9780123695291
About the author
Shubu Mukherjee
Affiliations and Expertise
Principal Engineer and Director, SPEARS (Simulation & Pathfinding of Efficient and Reliable Systems): Intel
Reviews
"Dr. Shubu Mukherjee's book is a welcome surprise: books by architecture leaders in major companies are few and far between. Written from the viewpoint of a working engineer, the book describes sources of soft errors and solutions involving device, logic, and architecture design to reduce the effects of soft errors." - Max Baron, Microprocessor Report - May 27, 2008