COVID-19 Update: We are currently shipping orders daily. However, due to transit disruptions in some geographies, deliveries may be delayed. To provide all customers with timely access to content, we are offering 50% off Science and Technology Print & eBook bundle options. Terms & conditions.
A Guide to RISC Microprocessors - 2nd Edition - ISBN: 9780126491401, 9780323137720

A Guide to RISC Microprocessors

2nd Edition

0.0 star rating Write a review
Author: Florence Slater
eBook ISBN: 9780323137720
Imprint: Academic Press
Published Date: 6th July 1992
Page Count: 322
Sales tax will be calculated at check-out Price includes VAT/GST
Price includes VAT/GST

Institutional Subscription

Secure Checkout

Personal information is secured with SSL technology.

Free Shipping

Free global shipping
No minimum order.


A Guide to RISC Microprocessors provides a comprehensive coverage of every major RISC microprocessor family. Independent reviewers with extensive technical backgrounds offer a critical perspective in exploring the strengths and weaknesses of all the different microprocessors on the market.

This book is organized into seven sections and comprised of 35 chapters. The discussion begins with an overview of RISC architecture intended to help readers understand the technical details and the significance of the new chips, along with instruction set design and design issues for next-generation processors. The chapters that follow focus on the SPARC architecture, SPARC chips developed by Cypress Semiconductor in collaboration with Sun, and Cypress's introduction of redesigned cache and memory management support chips for the SPARC processor. Other chapters focus on Bipolar Integrated Technology's ECL SPARC implementation, embedded SPARC processors by LSI Logic and Fujitsu, the MIPS processor, Motorola 88000 RISC chip set, Intel 860 and 960 microprocessors, and AMD 29000 RISC microprocessor family.

This book is a valuable resource for consumers interested in RISC microprocessors.

Table of Contents


Part I. Perspective

1. RISC Architectures

2. Instruction Set Design

3. Design Issues for Next-Generation Processors


4. SPARC Architecture

5. Cypress SPARC Chips

6. SPARC Support

7. Redesigned Cypress SPARC Chip Set

8. First ECL Microprocessor

9. LSI Logic Embedded Control SPARC Processor

10. Fujitsu Embedded SPARC Processor


11. MIPS Processor

12. MIPS R3000 System Design

13. IDT R3000 Derivative

14. MIPS Chip Set with Full ECL CPU Implementation

15. ECL Bus Controller

16. IDT Embedded MIPS Processors

17. High Integration on MIPS-Based Processor

18. MIPS with 64-Bit R4000 Architecture

Part IV. Motorola 88000

19. Motorola 88000 RISC Chip Set

20. Motorola 88200

Part V. Intel 860

21. Intel i860 Performance

22. Intel i860 Graphics Unit Evaluation

23. Intel i860 Parallel Processing Support

24. MASS860

Part VI. Intel 960

25. Intel Register Scoreboarding

26. Intel 960 Architecture

27. Intel 80960 Features

28. Intel 80960CA Superscalar Microprocessor

29. Conflict Avoidance

30. Intel 960SA and 960SB

Part VII. AMD 29000

31. AMD 29000 Architecture

32. AMD 29000 Bus Structure

33. AMD 29050


35. PA Workstations



No. of pages:
© Academic Press 1992
6th July 1992
Academic Press
eBook ISBN:

About the Author

Florence Slater

Ratings and Reviews