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| ARCHITECTURE DESIGN FOR SOFT ERRORS
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To order this title, and for more information, click here
By
Shubu Mukherjee, Principal Engineer and Director, SPEARS (Simulation & Pathfinding of Efficient and Reliable Systems): Intel
Description
This book provides a comprehensive description of the architetural techniques to tackle the soft error problem. It covers the new methodologies
for quantitative analysis of soft errors as well as novel, cost-effective architectural techniques to mitigate them. To provide readers
with a better grasp of the broader problem deffinition and solution space, this book also delves into the physics of soft errors and
reviews current circuit and software mitigation techniques.
TABLE OF CONTENTS
Chapter 1: Introduction
Chapter 2: Device- and Circuit-Level
Modeling, Measurement, and Mitigation
Chapter 3: Architectural Vulnerability Analysis
Chapter 4: Advanced Architectural Vulnerability
Analysis
Chapter 5: Error Coding Techniques
Chapter 6: Fault Detection via Redundant Execution
Chapter 7: Hardware Error Recovery
Chapter 8: Software Detection and Recovery
Audience
Practitioners in semi-conductor industry, researchers & developers in computer architecture, advanced graduate seminar courses on soft
errors, and (iv) as a reference book for undergraduate courses in
computer architecture. I will describe many basic and advanced
techniques
to make this book of interest to this broad audience.
Contents
Chapter 1: Introduction
Chapter 2: Device- and Circuit-Level Modeling, Measurement, and Mitigation
Chapter 3: Architectural Vulnerability
Analysis
Chapter 4: Advanced Architectural Vulnerability Analysis
Chapter 5: Error Coding Techniques
Chapter 6: Fault Detection via Redundant
Execution
Chapter 7: Hardware Error Recovery
Chapter 8: Software Detection and Recovery
| Bibliographic details |
Hardbound, 360 pages, publication date: FEB-2008
ISBN-13: 978-0-12-369529-1
ISBN-10: 0-12-369529-5
Imprint: MORGAN KAUFMANN
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| Price and Ordering |
Price:
EUR 51.95
USD 77.95
GBP 47.99
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Last update: 30 Jan 2010
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