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| NETWORK PROCESSOR DESIGN
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Issues and Practices, Volume 1
To order this title, and for more information, click here
By
Mark Franklin, Washington University, St. Louis
Patrick Crowley, University of Washington
Haldun Hadimioglu, Polytechnic University, New York
Peter Onufryk, Integrated Device Technology, Inc.
Description
As the demand for digital communication networks has increased, so have the challenges in network component design. To meet ever-escalating
performance, flexibility, and economy requirements, the networking industry has opted to build products around network processors. These
new chips range from task-specific processors, such as classification and encryption engines, to more general-purpose packet or communications
processors. Programmable yet application-specific, their designs are tailored to efficiently implement communications applications such
as routing, protocol analysis, voice and data convergence, firewalls, VPNs, and QoS.
Network processor design is an emerging field
with issues and opportunities both numerous and formidable. To help meet this challenge, the editors of this volume created the first
Workshop on Network Processors, a forum for scientists and engineers from academia and industry to discuss their latest research in the
architecture, design, programming, and use of these devices. In addition to including the results of the Workshop in this volume, the
editors also present specially commissioned material from practicing designers, who discuss their companies' latest network processors. Network Processor Design: Issues and Practices is an essential reference on network processors for graduate students, researchers,
and practicing designers.
Contents
Preface
Chapter 1. Network Processors: An Introduction to Design Issues, Patrick Crowley, Mark Franklin, Haldun Hadimioglu, and Peter
Onufryk
Part 1. Design Principles
Chapter 2. Benchmarking Network Processors, Prashant R. Chandra, Frank Hady, Raj Yavatkar, Tony
Bock,Mason Cabot and Philip Mathew
Chapter 3. A Methodology and Simulator for the Study of Network Processors, Deepak Suryanarayanan,
Gregory T. Byrd and John Marshall
Chapter 4. Design Space Exploration of Network Processor Architectures, Lothar Thiele, Samarjit Chakraborty,
Matthias Gries and Simon Kunzli
Chapter 5. Compiler Back-end Optimizations for Network Processors with Bit Packet Addressing, Jens
Wagner and Rainer Leupers
Chapter 6. A Network Processor Performance and Design Model with Benchmark Parameterization, Mark A. Franklin
and Tilman Wolf
Chapter 7. A Benchmarking Methodology for Network Processors, Mel Tsai, Chidamber Kulkarni, Christian Sauer, Niraj
Shah and Kurt Keutzer
Chapter 8. A Modeling Framework for Network Processor Systems, Patrick Crowley and Jean-Loup Baer
Part 2. Practices
Chapter 9. An Industry Analyst's Perspective on Network Processors, John Freeman
Chapter 10. Agere Systems - Communications Optimized
PayLoadPlus Network Processor Architecture, Bill Klein
Chapter 11. Cisco Systems - Toaster 2, John Marshall
Chapter 12. IBM - PowerNP
Network Processor, Mohammad Peyravian, Jean Calvignac and Ravi Sabhikhi
Chapter 13. Intel Corporation - Intel – IXP2400 Network Processor:
A 2nd Generation Intel – NPU, Prashant Chandra, Sridhar Lakshmanamurthy and Raj Yavatkar
Chapter 14. Motorola - C5e Network Processor,
Eran Cohen Strod and Patricia Johnson
Chapter 15. PMC-Sierra, Inc - ClassiPI, Vineet Dujari, Remby Taas and Ajit Shelat
Chapter 16
TranSwitch - ASPEN: Flexible Network Processing for Access Solutions, Subhash C. Roy
| Bibliographic details |
Paperback, 338 pages, publication date: OCT-2002
ISBN-13: 978-1-55860-875-7
ISBN-10: 1-55860-875-3
Imprint: MORGAN KAUFFMAN
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