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Technology and Tools
To order this title, and for more information, click here
By
Giovanni De Micheli, École Polytechnique Fédérale de Lausanne, Switzerland
Edited By
Luca Benini, University of Bologna, Italy.
Included in series
Systems on Silicon,
Description
The design of today's semiconductor chips for various applications, such as telecommunications, poses various challenges due to the complexity
of these systems. These highly complex systems-on-chips demand new approaches to connect and manage the communication between on-chip
processing and storage components and networks on chips (NoCs) provide a powerful solution.
This book is the first to provide a unified
overview of NoC technology. It includes in-depth analysis of all the on-chip communication challenges, from physical wiring implementation
up to software architecture, and a complete classification of their various Network-on-Chip approaches and solutions.
Audience
Primary: Researchers/Practitioners in Multiprocessor Systems on Chips; Networks on Chips. VLSI design companies (ST Microelectronics,
Arteris, etc.) involved currently with implementing NoCs on silicon.
Secondary: Graduate-level courses in System on Chip design.
Contents
I. Introduction and Motivation
Why on chip networks?
State of the art
Taxonomy
Technology trends
II. Architectures for NoCs
Direct
vs indirect networks
Topologies
Standard architectures and formal properties
Ad hoc networks
III. Physical network layer
Wiring issues
Physical routing
Signalling
Driver/receiver design
Noise immunity
Shielding
IV. Data-link layer and encoding
Medium access control
Data encoding
Error correcting codes: theory and practice
Arbitration issues
V. Switching and Routing in NoCs
Packets, flits.
Data
forwarding schemes
Routing: algorithms and routers
QoS guarantees
VI. Software for NoCs
Programming paradigms: shared medium vs message
passing
Middleware issues. layering and software encapsulation
Application layer issue and network-aware compilation
VII. Tools for
NoC Design
Analysis and Synthesis of NoCs
Present tools (Bones, Xpipes) and future outlook
VIII. On-Chip multiprocessors
High-performance
monolithic multiprocessors
Network issues
IX. SoCs based on NoCs
Examples of other design chips using NoCs
| Bibliographic details |
Hardbound, 408 pages, publication date: JUL-2006
ISBN-13: 978-0-12-370521-1
ISBN-10: 0-12-370521-5
Imprint: MORGAN KAUFFMAN
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| Price and Ordering |
Price:
EUR 53.95
USD 74.95
GBP 44.99
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Last update: 5 Sep 2009
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