On-Chip Communication Architectures

System on Chip Interconnect

By

  • Sudeep Pasricha
  • Nikil Dutt, Donald Bren School of Information and Computer Science, Irvine

Over the past decade, system-on-chip (SoC) designs have evolved to address the ever increasing complexity of applications, fueled by the era of digital convergence. Improvements in process technology have effectively shrunk board-level components so they can be integrated on a single chip. New on-chip communication architectures have been designed to support all inter-component communication in a SoC design. These communication architecture fabrics have a critical impact on the power consumption, performance, cost and design cycle time of modern SoC designs. As application complexity strains the communication backbone of SoC designs, academic and industrial R&D efforts and dollars are increasingly focused on communication architecture design. This book is a comprehensive reference on concepts, research and trends in on-chip communication architecture design. It will provide readers with a comprehensive survey, not available elsewhere, of all current standards for on-chip communication architectures.
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Audience

Practitioners/Researchers in VLSI Design, System on Chip Design, and Networks on Chips at integrated circuit design companies such as Xilinx, IBM, Texas Instruments, Freescale Semiconductor, Infineon, etc; Software developers in electronic design automation companies such as Synopsis, Cadence, Mentor Graphics, Magma, etc. Graduate students in VLSI design, training to go to work for the above.

 

Book information

  • Published: April 2008
  • Imprint: MORGAN KAUFMANN
  • ISBN: 978-0-12-373892-9


Table of Contents

An Overview of System-on-Chips; Need for Communication-centric Design Flow; Basic Concepts of Bus-based Communication Architectures; Bus-based Communication Architecture Specification Standards; Limitations of Current Design Approaches; Physical and Electrical Analysis; Models for Performance Exploration; Power/Energy Exploration; Design and Synthesis of Communication Architectures; Innovative Aspects; Dynamic Bus Reconfiguration; Bus Encoding Techniques; Interface Synthesis and Optimization; Secure On-chip Communication Infrastructure; Verification; Custom Bus Design; Open Problems; Network-on-Chips; Optical Interconnects; Wireless Interconnects; Physical Design Trends