Network Processor Design book cover

Network Processor Design

Issues and Practices, Volume 2

Responding to ever-escalating requirements for performance, flexibility, and economy, the networking industry has opted to build products around network processors. To help meet the formidable challenges of this emerging field, the editors of this volume created the first Workshop on Network Processors, a forum for scientists and engineers to discuss latest research in the architecture, design, programming, and use of these devices. This series of volumes contains not only the results of the annual workshops but also specially commissioned material that highlights industry's latest network processors.Like its predecessor volume, Network Processor Design: Principles and Practices, Volume 2 defines and advances the field of network processor design. Volume 2 contains 20 chapters written by the field's leading academic and industrial researchers, with topics ranging from architectures to programming models, from security to quality of service.

Audience
Processor designers and system designers in research and industry

Paperback, 464 Pages

Published: November 2003

Imprint: Morgan Kaufmann

ISBN: 978-0-12-198157-0

Contents

  • Network Processor Design: Issues and Practics, Volume 2ContentsPrefaceChapter 1. Network Processors: Themes and Challenges, Patrick Crowley, Mark Franklin, Haldun Hadimioglu, and Peter Z. OnufrykPart 1. Design PrinciplesChapter 2. A Programmable Scalable Platform for Next Generation Networking, Christos J.Georgiou, Valentina Salapura, and Monty DenneauChapter 3. Power Considerations in Network Processor Design, Mark A. Franklin and Tilman Wolf Chapter 4. Worst-Case Execution Time Estimation for Hardware-assisted Multithreaded Processors, Patrick Crowley and Jean-Loup BaerChapter 5. Multiprocessor Scheduling in Processor-based Router Platforms: Issues and Ideas, Anand Srinivasan, Philip Holman, James Anderson, Sanjoy Baruah and Jasleen KaurChapter 6. A Massively Multithreaded Packet Processor, Steve Melvin, Mario Nemirovsky, Enric Musoll, Jeff Huynh, Rodolfo Milito, Hector Urdaneta, and Koroush Saraf Chapter 7. Exploring Trade-offs in Performance and Programmability of Processing Element Topologies for Network Processors, Matthias Gries, Chidamber Kulkarni, Christian Sauer and Kurt KeutzerChapter 8. Packet Classification and Termination in a Protocol Processor, Ulf Nordqvist and Dake LiuChapter 9. NP-Click: A Programming Model for the Intel IXP1200, Niraj Shah, William Plishker and Kurt KeutzerChapter 10. NEPAL: A Framework for Efficiently Structuring Applications for Network Processors, Gokhan Memik and William H. Mangione-SmithChapter 11. Efficient and Faithful Performance Modeling for Network-Processor Based System Designs, Prashant Pradhan, Wen Xu, Indira Nair and Sambit SahuChapter 12. High-speed Legitimacy-based DDoS Packet Filtering with Network Processors: A Case Study and Implementation on the Intel IXP1200, Roshan K. Thomas, Brian Mark, Tommy Johnson and James CroallChapter 13. Directions in Packet Classification for Network Processors, Michael E. Kounavis, Alok Kumar, Harrick Vin, Raj Yavatkar and Andrew T. CampbellPart 2. PracticesChapter 14. Implementing High-performance, High-value Traffic Management Using Agere Network Processor Solutions, Jian-Guo Chen, David Sonnier, Robert Munoz, Vinoj Kumar, and Ambalavanar ArulambalamChapter 15. AMCC - nPcoreTM "NISC" Architecture, Robin Melnick and Keith MorrisChapter 16. Adaptable Badwidth Allocation for QoS Support in Network Processors, Clark Jeffries, Mohammad Peyravian, and Ravi SabhikhiChapter 17. IDT - Network Search Engine with QDRTM LA-1 Interface, Michael J. MillerChapter 18. Implementing Voice over AAL2 on a Network Processor, Jaroslaw Sydir, Prashant Chandra, Alok Kumar, Sridhar Lakshmanamurthy, Longsong Lin, Muthaiah VenkatachalamChapter 19. Implementing QoS Mechanisms on the Motorola C-Port C-5e Network Processor, Pranav GambhireChapter 20. A C-based Programming Language for Multiprocessor Network SoC Architectures. Kevin Crozier

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