Low-Power Design of Nanometer FPGAs
Architecture and EDA
Low-Power Design of Nanometer FPGAs Architecture and EDA is an invaluable reference for researchers and practicing engineers concerned with power-efficient, FPGA design. State-of-the-art power reduction techniques for FPGAs will be described and compared. These techniques can be applied at the circuit, architecture, and electronic design automation levels to describe both the dynamic and leakage power sources and enable strategies for codesign.
Researchers, Circuit-Design Professionals, and EE/ECE Graduate Students concerned with low-power FPGA design. This includes designers at companies globally such as Xilinx, Altera, Actel, Cypress, Lattice Semiconductor, TI, Mentor Graphics, Cadence, Synopsis, Magma, Quicklogic, National Semiconductor, and Freescale.