FPGAs: Instant Access


  • Clive Maxfield, Engineer, TechBytes, and Editor of PLDesignline.com EDA industry consultant, EDN columnist, and Embedded Systems Guru

FPGAs are central to electronic design! The engineers designing these devices are in need of essential information at a moment's notice. The Instant Access Series provides all the critical content that a computer design engineer needs in his or her daily work. This book provides an introduction to FPGAs as well as succinct overviews of fundamental concepts and basic programming. FPGAs are a customizable chip flexible enough to be deployed in a wide range of products and applications. There are several basic design flows detailed including ones based in C/C++, DSP, and HDL. This book is filled with images, figures, tables, and easy to find tips and tricks for the engineer that needs material fast to complete projects to deadline.Table of ContentsCHAPTER 1 The FundamentalsCHAPTER 2 FPGA ArchitecturesCHAPTER 3 Programming (Configuring) an FPGACHAPTER 4 FPGA vs. ASIC DesignsCHAPTER 5 “Traditional” Design FlowsCHAPTER 6 Other Design FlowsCHAPTER 7 Using Design ToolsCHAPTER 8 Choosing the Right Device
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Circuit Designers, Applications Engineers, Software and Hardware Engineers; Computer Engineers


Book information

  • Published: July 2008
  • Imprint: NEWNES
  • ISBN: 978-0-7506-8974-8

Table of Contents

Table of ContentsCHAPTER 1 The FundamentalsFPGA DefinitionsWhy Use FPGAs?ApplicationsSome Technology BackgroundCHAPTER 2 FPGA ArchitecturesDefinitionsMore on Programming TechnologiesFine-, Medium-, and Coarse-grained ArchitecturesLogic BlocksFast Carry ChainsEmbedded RAMsEmbedded Multipliers, Adders, etc.Embedded Processor CoresClock ManagersGeneral-purpose I/OGigabit TransceiversIntellectual Property (IP)System Gates vs. Real GatesCHAPTER 3 Programming (Configuring) an FPGADefinitionsConfiguration CellsAntifuse-based FPGAsSRAM-based FPGAsUsing the Configuration PortUsing the JTAG PortUsing an Embedded ProcessorCHAPTER 4 FPGA vs. ASIC DesignsDefinitionsCoding StylesPipelining and Levels of LogicAsynchronous Design PracticesClock ConsiderationsRegister and Latch ConsiderationsResource SharingState Machine EncodingTest MethodologiesMigrating ASIC Designs to FPGAs and Vice VersaCHAPTER 5 “Traditional” Design FlowsDefinitionsSchematic-based Design FlowsHDL-based Design FlowsCHAPTER 6 Other Design FlowsDefinitionsC/C++-based Design FlowsDSP-based Design FlowsEmbedded-processor-based Design FlowsCHAPTER 7 Using Design ToolsDefinitionsSimulationSynthesisTiming Analysis Verification in generalFormal verificationMiscellaneousCHAPTER 8 Choosing the Right DeviceDefinitionsChoosingTechnologyBasic Resources and PackagingGeneral-purpose I/O InterfacesEmbedded Multipliers, RAMs, etc.Embedded Processor CoresGigabit I/O CapabilitiesIP AvailabilitySpeed GradesFuture FPGA DevelopmentsSummary