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Digital Integrated Circuit Design Using Verilog and Systemverilog
1st Edition - September 30, 2014
Author: Ronald W. Mehler
Language: English
Hardback ISBN:9780124080591
9 7 8 - 0 - 1 2 - 4 0 8 0 5 9 - 1
eBook ISBN:9780124095298
9 7 8 - 0 - 1 2 - 4 0 9 5 2 9 - 8
For those with a basic understanding of digital design, this book teaches the essential skills to design digital integrated circuits using Verilog and the relevant extensions of Sy…Read more
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For those with a basic understanding of digital design, this book teaches the essential skills to design digital integrated circuits using Verilog and the relevant extensions of SystemVerilog. In addition to covering the syntax of Verilog and SystemVerilog, the author provides an appreciation of design challenges and solutions for producing working circuits. The book covers not only the syntax and limitations of HDL coding, but deals extensively with design problems such as partitioning and synchronization, helping you to produce designs that are not only logically correct, but will actually work when turned into physical circuits. Throughout the book, many small examples are used to validate concepts and demonstrate how to apply design skills.
This book takes readers who have already learned the fundamentals of digital design to the point where they can produce working circuits using modern design methodologies. It clearly explains what is useful for circuit design and what parts of the languages are only software, providing a non-theoretical, practical guide to robust, reliable and optimized hardware design and development.
Produce working hardware: Covers not only syntax, but also provides design know-how, addressing problems such as synchronization and partitioning to produce working solutions
Usable examples: Numerous small examples throughout the book demonstrate concepts in an easy-to-grasp manner
Essential knowledge: Covers the vital design topics of synchronization, essential for producing working silicon; asynchronous interfacing techniques; and design techniques for circuit optimization, including partitioning
Professional engineers; potential for use as background reading on graduate and senior undergraduate courses
About the author
Preface
Acknowledgments
Chapter 1: Introduction
Abstract
Who should read this book
Hardware description languages and methodology
What this book covers
Historical perspective
Verilog and Systemverilog
Book organization
Chapter 2: Bottom-up design
Abstract
Primitive instantiation
Designing with primitives
Identifiers and escaped identifiers
Bus declarations
Design hierarchy and test fixtures
Port association
Timescales
Summary
Chapter 3: Behavioral coding part I: blocks, variables, and operators
Abstract
Top-down design
Synthesizable and nonsynthesizable code
Register Transfer Level (RTL)
Continuous assignments
Implicit continuous assignments
Functional blocks: always and initial
Named blocks
Sensitivity lists
Splitting assignments
Variables
Operators
Summary
Chapter 4: Behavioral coding part II: defines, parameters, enumerated types, and packages
Abstract
Global definitions
Parameters
Overriding default values
Local parameters
Specify parameters
Enumerated types
Constants
Packages
Filling a scalable variable with all ones
Summary
Chapter 5: Behavioral coding part III: loops and branches
Chapter 8: Simulation, timing, and race conditions
Abstract
Simulation queues
Race conditions
Derived clocks and delta time
Assertions
Summary
Chapter 9: Architectural choices
Abstract
FPGA versus ASIC
Design reuse
Partitioning
Area and speed optimization
Power optimization
Summary
Chapter 10: Design for testability
Abstract
Yield, testing, and defect level
Fault modeling
Activation and sensitization
Logic scan
Boundary scan
Built in self-test
Parametric testing
Summary
Chapter 11: Library modeling
Abstract
Component libraries
Cell models
User-defined primitives
Combinational cells
Sequential cells
Model performance
Summary
Chapter 12: Design examples
Abstract
State machine
FIR filters
FIFO
DMX receiver
Appendix A: SystemVerilog keywords
Appendix B: Standard combinational and sequential functions
Appendix C: Number systems
Index
No. of pages: 448
Language: English
Edition: 1
Published: September 30, 2014
Imprint: Newnes
Hardback ISBN: 9780124080591
eBook ISBN: 9780124095298
RM
Ronald W. Mehler
Ronald Mehler is a professor of electrical and computing engineering at California State University, Northridge. Before joining the faculty at CSUN, he worked in private industry for 20 years, mostly designing integrated circuits using hardware description languages and logic synthesis. The primary focus of his research has been on design automation for application specific integrated circuit (ASIC) development.
Affiliations and expertise
Professor of Electrical and Computing Engineering at California State University, Northridge
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