Demystifying Chipmaking


  • Richard Yanda, Semiconductor Services, Redwood City, CA, USA
  • Michael Heynes, Semiconductor Services, Redwood City, CA, USA
  • Anne Miller, Semiconductor Services, Redwood City, CA, USA

This book takes the reader through the actual manufacturing process of making a typical chip, from start to finish, including a detailed discussion of each step, in plain language. The evolution of today's technology is added to the story, as seen through the eyes of the engineers who solved some of the problems. The authors are well suited to that discussion since they are three of those same engineers. They have a broad exposure to the industry and its technology that extends all the way back to Shockley Laboratories, the first semiconductor manufacturer in Silicon Valley.The CMOS (Complementary Metal-Oxide-Semiconductor) process flow is the focus of the discussion and is covered in ten chapters. The vast majority of chips made today are fabricated using this general method. In order to ensure that all readers are comfortable with the vocabulary, the first chapter carefully and clearly introduces the science concepts found in later chapters. A chapter is devoted to pointing out the differences in other manufacturing methods, such as the gallium arsenide technology that produces chips for cell phones. In addition, a chapter describing the nature of the semiconductor industry from a business perspective is included."The entire process of making a chip is surprisingly easy to understand. The part of the story that defies belief is the tiny dimensions: the conducting wires and other structures on a chip are more than a hundred times thinner than a hair - and getting thinner with every new chip design."
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Electronics engineers, engineering managers, and students


Book information

  • Published: April 2005
  • Imprint: NEWNES
  • ISBN: 978-0-7506-7760-8


“...a useful guide for engineers just entering the packaging sector of the semiconductor industry or for newly vetted engineering school grads.” – Ron Iscoff, Editor, Chip Scale Review "Demystifying Chipmaking...will provide an interesting overview of the IC fabrication process while familiarizing you with the terminology." - Rick Nelson, Chief Editor, Test & Measurement World

Table of Contents

ForewardAcknowledgementsAbout the AuthorsWhat’s on the CD-ROM?1. IC Fabrication Overviewa. Introduction b. Support Technologiesc. Integrated Circuit Fabricationd. Test and Assemblye. Summary2. Support Technologiesa. Introductionb. Contamination Controlc. Crystal Growth and Wafer Preparationd. Circuit Designe. Photomask and Reticle Preparation3. Forming Wellsa. Introductionb. Initial Oxidationc. Photolithographyd. Ion Implantation4. Isolate Active Areas (Shallow Trench Isolation)a. Introduction to Shallow Trench Isolationb. Pad Oxide Growthc. Silicon Nitride Depositiond. Photolithography for Photo/Etche. Hard Mask Formation Using Plasma Etchf. Form Trenches in Silicon with Plasma Etchg. Fill Trenches with Silicon Dioxideh. Chemical Mechanical Polishing (CMP) to Remove Excess Dioxidei. Wet Etch Removal of Silicon Nitride and Pad Oxide5. Building the Transistorsa. Introductionb. Thin Film Formationc. Poly Gate Formationd. Source/Drain Formatione. Salicide Formation6. First Level Metallizationa. Introductionb. Nitride and Oxide Depositionsc. CMP Planarizationd. Photo/Etch for Contact Holese. Tungsten Plug Processf. Low-k Dielectric Processg. Copper First Level Interconnection Process7. Multilevel Metal Interconnects and Dual Damascenea. Introductionb. Deposit Barrier Layer and Intermetal Dielectricc. Dual Damascene Processd. Form Bonding Padse. Final Passivation Process8. Test and Assemblya. Introductionb. Wafer and Chip Testingc. Assembly and PackagingAppendix A: Science Overview Introduction1. Atoms and Molecules2. Gases3. Chemistry4. Solids5. Electricity, Electric and Magnetic FieldsAppendix B: Plasma Etch Supplement to Chapter 41. Plasma Etcher Theory2. Plasma Etch Process RequirementsBibliographyIndex