Complete PCB Design Using OrCad Capture and Layout book cover

Complete PCB Design Using OrCad Capture and Layout

This book provides instruction on how to use the OrCAD design suite to design and manufacture printed circuit boards. The book is written for both students and practicing engineers who need a quick tutorial on how to use the software and who need in-depth knowledge of the capabilities and limitations of the software package. There are two goals the book aims to reach:The primary goal is to show the reader how to design a PCB using OrCAD Capture and OrCAD Layout. Capture is used to build the schematic diagram of the circuit, and Layout is used to design the circuit board so that it can be manufactured. The secondary goal is to show the reader how to add PSpice simulation capabilities to the design, and how to develop custom schematic parts, footprints and PSpice models. Often times separate designs are produced for documentation, simulation and board fabrication. This book shows how to perform all three functions from the same schematic design. This approach saves time and money and ensures continuity between the design and the manufactured product.

PRIMARY: Electrical engineers; printed circuit board design engineers. These designers work in numerous industries, given how many devices incorporate PCBs.SECONDARY: Some possibility for upside in academic market, by working with the OrCAD var, EMA Design Automation.


Published: April 2007

Imprint: Newnes

ISBN: 978-0-7506-8214-5


  • “I've found this book to be very helpful and exactly what I've been looking for. Kraig Mitzner has done a wonderful job of covering the full spectrum of printed circuit board fabrication. The content spans not only the OrCAD Layout software, but the physical process of PCB fabrication and advanced topics such as RF issues.” —Jeff Will, Valparaiso University


  • CHAPTER 1. INTRODUCTION TO CAD AND PCB FABRICATION COMPUTER AIDED DESIGN AND THE ORCAD DESIGN SUITEPRINTED CIRCUIT BOARD FABRICATIONPCB cores and layer stack-upPCB fabrication processPhotolithography and chemical etchingMechanical millingLayer registrationFUNCTION OF ORCAD LAYOUT IN THE PCB DESIGN PROCESSDESIGN FILES CREATED BY LAYOUTLayout format files (.MAX) Post process (Gerber) filesPCB assembly layers and filesCHAPTER 2. INTRODUCTION TO THE PCB DESIGN FLOW BY EXAMPLEOVERVIEW OF THE DESIGN FLOWCREATING A CIRCUIT DESIGN WITH CAPTUREStarting a New ProjectPlacing PartsWiring (Connecting) the PartsCreating the Layout Netlist in CaptureDESIGNING THE PCB WITH LAYOUTStarting Layout and Importing the NetlistMaking a Board OutlinePlacing the PartsAutorouting the BoardManual RoutingClean-upLocking TracesPerforming a Design Rule Check (DRC) Post Processing the Board Design for ManufacturingCHAPTER 3. PROJECT STRUCTURES AND THE LAYOUT TOOLSETPROJECT SETUP AND SCHEMATIC ENTRY DETAILSCapture Projects ExplainedCapture Part Libraries explainedUNDERSTANDING THE LAYOUT ENVIRONMENT AND TOOLSETBoard Technology FilesThe AutoECO UtilityThe Session Frame and Design WindowsThe Tool BarControlling the AutorouterPost Processing and Layer DetailsCHAPTER 4. INTRODUCTION TO INDUSTRY STANDARDS 85INTRODUCTION TO THE STANDARDS ORGANIZATIONSInstitute for Printed Circuits (IPC) Electronic Industries Alliance (EIA) Joint Electron Device Engineering Council (JEDEC) International Engineering Consortium (IEC) Military Standards (MIL-STD) American National Standards Institute (ANSI) Institute of Electrical and Electronics Engineers (IEEE) CLASSES AND TYPES OF PCBSPerformance ClassesProducibility LevelsFabrication types and Assembly subclassesOrCAD Layout Design Domplexity Levels—IPC Performance Classes 93IPC Land Pattern Density LevelsINTRODUCTION TO STANDARD FABRICATION ALLOWANCES (SFA)Registration tolerancesBreakout and annular ring controlPCB DIMENSIONS AND TOLERANCESStandard panel sizesTooling area allowances and effective panel usageStandard Finished PCB ThicknessCore ThicknessPrepreg ThicknessCopper thickness for PTHs and viasCopper cladding/foil thicknessCOPPER TRACE AND ETCHING TOLERANCESSTANDARD HOLE DIMENSIONSAspect ratio (hole size to PCB thickness) SOLDERMASK TOLERANCECHAPTER 5. PCB DESIGN FOR MANUFACTURABILITYINTRODUCTION TO PCB ASSEMBLY AND SOLDERING PROCESSESASSEMBLY PROCESSESManual Assembly ProcessesAutomated Assembly Processes (Pick and Place) SOLDERING PROCESSESManual SolderingWave SolderingReflow SolderingCOMPONENT PLACEMENT AND ORIENTATION GUIDEGeneral ConsiderationsCOMPONENT SPACING FOR THROUGH-HOLE DEVICES (THDS) Discrete THDsIntegrated circuit through-hole devicesMixed discrete and IC through-hole devicesHoles and jumper wiresCOMPONENT SPACING FOR SURFACE MOUNTED DEVICES (SMDS) Discrete SMDsIntegrated circuit SMDsMixed discrete and IC SMDsMIXED THD AND SMD SPACING REQUIREMENTSFOOTPRINT AND PADSTACK DESIGN FOR PCB MANUFACTURABILITYLAND PATTERNS FOR SURFACE MOUNTED DEVICES (SMD) SMD Padstack DesignSMD Footprint DesignLAND PATTERNS FOR THROUGH-HOLE DEVICES (THD) Footprint design for through-hole devicesPadstack design for through-hole devicesHole to lead ratioPTH land dimension (annular ring width) Clearance between Plane layers and PTHsSoldermask and solder paste dimensionsCHAPTER 6. PCB DESIGN FOR SIGNAL INTEGRITYCIRCUIT DESIGN ISSUES VS. PCB DESIGN ISSUESNoiseDistortionFrequency responseELECTROMAGNETIC INTERFERENCE AND CROSSTALKMagnetic fields and inductive couplingLoop inductanceElectric fields and Capacitive CouplingGROUND PLANES, AND GROUND BOUNCEWhat ground is and what it is notGround (return) planesPCB ELECTRICAL CHARACTERISTICSCharacteristic ImpedanceReflectionsRingingElectrically long tracesCritical lengthTransmission line terminationsPCB ROUTING TOPICSParts placement for Electrical considerationsPCB layer stackupBypass capacitors and fanoutTrace width for current carrying capabilityTrace width for characteristic impedanceTrace spacing for Voltage withstandingTrace spacing to minimize crosstalk (3-W Rule) Traces with acute and 90° anglesCHAPTER 7. MAKING AND EDITING CAPTURE PARTSTHE CAPTURE PART LIBRARIESTYPES OF PACKAGINGHomogeneous partsHeterogeneous PartsPINSPART EDITING TOOLSThe Select Tool and SettingsThe Pin ToolsThe Graphics ToolsThe Zoom ToolsCONSTRUCTING CAPTURE PARTSMethods of constructing new parts: METHOD 1: CONSTRUCTING PARTS USING THE NEW PART OPTION (DESIGN MENU) Design example for a passive, homogeneous partDesign example for an active, multi-part, homogeneous componentAssigning power pin visibilityDesign example for a passive, heterogeneous partMETHOD 2: CONSTRUCTING PARTS WITH CAPTURE USING THE DESIGN SPREADSHEETMETHOD 3: CONSTRUCTING PARTS USING GENERATE PART FROM THE TOOLS MENUMETHOD 4: GENERATING PARTS WITH THE PSPICE MODEL EDITORMaking and/or obtaining new PSpice libraries for making new Capture partsDownload libraries and/or models from the internet. Making a Capture part from a Capture schematic designAdding PSpice templates (models) to pre-existing Capture parts CONSTRUCTING CAPTURE SYMOBLSCHAPTER 8. MAKING AND EDITING LAYOUT FOOTPRINTSINTRODUCTION TO THE LIBRARY MANGERINTRODUCTION LAYOUT’S FOOTPRINT LIBRARIES AND NAMING CONVENTIONSLayout’s footprint librariesNaming conventionsTHE COMPOSITION OF FOOTPRINTSPadstacksObstaclesTextDatums and insertion originsTHE BASIC FOOTPRINT DESIGN PROCESSWORKING WITH PADSTACKSAccessing existing padstacksEditing padstack properties from the spreadsheetSaving footprints and padstacksFOOTPRINT DESIGN EXAMPLESDesign example 1: A surface mount footprint designDesign example2: A modified through-hole footprint design exampleUSING THE PAD ARRAY GENERATORIntroductionFootprint Design for pin grid arrays (PGA) Footprint Design for ball grid arrays (BGA) Blind, buried, and micro viasMounting holesPrinting a Catalog of a footprint libraryCHAPTER 9. PCB DESIGN EXAMPLESOVERVIEW OF THE DESIGN FLOWEXAMPLE 1: DUAL POWER SUPPLY, ANALOG DESIGNInitial design concept and preparationPROJECT SETUP AND DESIGN IN CAPTURESetting up the projectDrawing the schematic with CapturePlacing partsConnect parts with wires (signal nets) Making power and ground connectionsPreparing the design for LayoutGrouping related components. AnnotationPerforming a schematic DRC in CaptureGenerating the Layout netlist (.MNL) DEFINING THE BOARD REQUIREMENTSSpecifying packaging and assembly requirementsDefining the layer stack-upDetermining trace widthDetermining trace spacing requirementsChoosing a technology file (.TCH) Choosing a strategy file (.SF) IMPORTING THE DESIGN INTO LAYOUTSETTING UP THE BOARDMaking a board outlineAdding mounting holesAdding dimension measurementsPlacing partsFinding partsPlacing parts in the queueInter-tool communicationSetting up the layersConverting a Routing layer to a PLANE LayerAdding additional PLANE LayersAssigning Nets to layersSpecifying vias for fanoutsPRE-ROUTING THE BOARDFanning out power and groundFanning out power and groundChanging colors of netsManually routing fanoutsMoving and unrouting fanoutsUsing free viasLocking tracesViewing DRC errorsChanging padstack propertiesAUTOROUTING THE BOARDControlling the route boxLoading and editing a routing strategy fileRunning the AutorouterFINALIZING THE DESIGNPost-routing inspectionChecking routing statisticsSynchronizing the design with Capture (Back Annotation) EXAMPLE 2: MIXED ANALOG/DIGITAL DESIGN USING SPLIT POWER, GROUND PLANESMixed signal circuit design in Capture. Power and Ground connections to Digital and Analog partsConnecting separate Analog and Digital grounds to a split planeUsing Busses for digital netsDefining the layer stack-up for split planesEstablishing a primary power planeCreating split ground planesCreating nested power planes with copper poursUsing anti-copper on plane layersSetting up and running the AutorouterMoving a routed trace to a different layerAdding ground planes and guard traces to routing layersDefining vias for flood planes/poursSetting the copper pour spacingStitching a ground plane manuallyUsing anit-copper obstacles on copper poursRouting guard traces and ringsEXAMPLE 3: MULTI-PAGE, MULTI POWER AND GROUND, MIXED A/D DESIGNProject setup for PSpice simulation and LayoutAdding schematic pages to the designUsing off-page connectors with wiresUsing off-page connectors with bussesSetting up multiple ground systemsSettin up PSpice sourcesPerforming PSpice simulationsPreparing the simulated project for LayoutAssigning a new technology filePlacing parts on the bottom (back) of a boardLayer stack-up for a multi-ground systemNet-layer assignmentsThrough-hole and blind Via setupFanning out a board with multiple viasOverriding known errors in LayoutAutorouting with the DRC/Route BoxUsing forced thermals to connect ground planesUsing the AutoECO to update a board from CaptureEXAMPLE 4: HIGH-SPEED DIGITAL DESIGNLayer setup for microstrip transmission linesVia design for heat spreadersConstructing a heat spreader with copper area obstaclesUsing free vias as heat pipesDetermining critical trace length of transmission linesRouting controlled impedance tracesMoated ground areas for clock circuitsRouting curved tracesGate and pin swappingStitching a ground plane with the free via matrixMISCELLANEOUS ITEMSFixing Bad Pad exitsDesign cache—Cleanup, Replace, UpdateAdding test pointsTypes of AutoECOsMaking a custom Capture templateMaking a custom Layout technology/template fileUsing the Stackup EditorSubmitting Stackup Drawings with Gerber filesAdding Solder thievesPrinting a footprint catalog from a PCB designCHAPTER 10. POST PROCESSING AND BOARD FABRICATIONTHE CIRCUIT DESIGN WITH ORCADSchematic design in CaptureThe board design with LayoutPost processing the design with LayoutFABRICATING THE BOARDChoosing a board houseSetting up a user accountSubmitting Gerber files and requesting a quoteAnnotating the layer types and stackupReceipt inspection and testing9Non-standard Gerber files9CHAPTER 11. ADDITIONAL TOOLSUSING PSPICE TO SIMULATE TRANSMISSION LINESSimulating digital transmission linesSimulating Analog signalsUSING MICROSOFT EXCEL WITH A BILL OF MATERIALS GENERATED BY CAPTUREUSING THE SPECCTRA AUTOROUTER WITH LAYOUTINTRODUCTION TO GERBTOOLOpening a Layout generated Gerber file with GerbToolMaking a .DRL file for a CNC machinePanelizationUSING CAD TOOLS TO 3-D MODEL A PCB


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